From patchwork Fri Jun 16 10:16:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13282577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39F78EB64D7 for ; Fri, 16 Jun 2023 10:17:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oHSWje1ZoKOFO68fCZlX4oyB0SdRj+0ReajcveVc7Iw=; b=yDGqPaZDzuP+mD LMTvtsQGqHJP023Hu7WVbdQN0/fL60RA0jRbr/8XpEgKRBp+MD8r8IzFBUqLjr69b6YJgr0onvcGg zge9wmyZiW55Jlx+AIfba8KnCS2wOMnxeRFIYYINe0LZvXq7yBgyLPNeaBEX6/2Hv4v+5rJu5cs2i YN7Scq+3m0gSiEd2SOibQmF2hsmKDcnK+3CZYUQ4o5IdTZiIcN0BMvpLb8MMQLvwdtmtYyV4Oh8On YaHy3OFj9fTUPZITst6ZcIuppdOrXF3TghmYYZ0Xt2vPo8aIzuT0ZOXrSJPlg4canO1XQPHy4ni9x vLSCTkv93Fsz3tiRPoug==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qA6WJ-00HaJn-2g; Fri, 16 Jun 2023 10:17:31 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qA6WG-00HaIq-2y for linux-arm-kernel@lists.infradead.org; Fri, 16 Jun 2023 10:17:30 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686910649; x=1718446649; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2qNwSdEgN1RaimJx1SZpG9LQraX7Rtvs7wkFVvba3II=; b=oMfbwnY6w1w63FCnWSBsca+VB1iNUZ2azT92P1vqNlxzX7n5fbCcGhVK itRnnT3nBO4DhlUnsB14dpBbzyFcj0MFf4zqDIoc5Mv9+0BqkTsvl5RrA j8KBFo4aruodEgzike01Hzs4GmP3DXiFEUa121VtPeTQ92Y37qBIAt4Xn CRfJSIvo1epop9ZCD/prJs/wL2W/QAjL/ggLu36onN3RYfOOKEApg29pE l0ZlWsNoQojiIJP2r/ksGJoX8f4yIs17iMIy36m6qiVnuZ6WCKyChRaME 0LwtsR8pgYPwOpNguvGiN+bpBa+flFUnFy+08o1dvATkxH6yesRe035eD g==; X-IronPort-AV: E=Sophos;i="6.00,247,1681196400"; d="scan'208";a="216335035" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Jun 2023 03:17:24 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 16 Jun 2023 03:17:14 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 16 Jun 2023 03:17:11 -0700 From: Claudiu Beznea To: , , , , , CC: , , , , Claudiu Beznea , Conor Dooley Subject: [PATCH v3 3/4] dt-bindings: power: reset: atmel,sama5d2-shdwc: convert to yaml Date: Fri, 16 Jun 2023 13:16:45 +0300 Message-ID: <20230616101646.879480-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230616101646.879480-1-claudiu.beznea@microchip.com> References: <20230616101646.879480-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230616_031729_024446_4CE0F302 X-CRM114-Status: GOOD ( 18.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert Microchip AT91 SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its compatible. There is no usage of this syscon in the current code but it may be necessary in future as some registers of SHDWC are accessed in different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c). Thus update the YAML with it to make DT checkers happy. Signed-off-by: Claudiu Beznea Reviewed-by: Conor Dooley Acked-by: Nicolas Ferre --- .../devicetree/bindings/arm/atmel-sysregs.txt | 63 ---------- .../power/reset/atmel,sama5d2-shdwc.yaml | 114 ++++++++++++++++++ 2 files changed, 114 insertions(+), 63 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index e6b2fb291b45..67a66bf74895 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -52,69 +52,6 @@ Example: reg = <0xe3804000 0x1000>; }; -SHDWC SAMA5D2-Compatible Shutdown Controller - -1) shdwc node - -required properties: -- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or - "microchip,sama7g5-shdwc" -- reg: should contain registers location and length -- clocks: phandle to input clock. -- #address-cells: should be one. The cell is the wake-up input index. -- #size-cells: should be zero. - -optional properties: - -- debounce-delay-us: minimum wake-up inputs debouncer period in - microseconds. It's usually a board-related property. -- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. - -optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties: -- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. - -The node contains child nodes for each wake-up input that the platform uses. - -2) input nodes - -Wake-up input nodes are usually described in the "board" part of the Device -Tree. Note also that input 0 is linked to the wake-up pin and is frequently -used. - -Required properties: -- reg: should contain the wake-up input index [0 - 15]. - -Optional properties: -- atmel,wakeup-active-high: boolean, the corresponding wake-up input described - by the child, forces the wake-up of the core power supply on a high level. - The default is to be active low. - -Example: - -On the SoC side: - shdwc@f8048010 { - compatible = "atmel,sama5d2-shdwc"; - reg = <0xf8048010 0x10>; - clocks = <&clk32k>; - #address-cells = <1>; - #size-cells = <0>; - atmel,wakeup-rtc-timer; - }; - -On the board side: - shdwc@f8048010 { - debounce-delay-us = <976>; - - input@0 { - reg = <0>; - }; - - input@1 { - reg = <1>; - atmel,wakeup-active-high; - }; - }; - Special Function Registers (SFR) Special Function Registers (SFR) manage specific aspects of the integrated diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml new file mode 100644 index 000000000000..8c58e12cdb60 --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip AT91 SAMA5D2 SHDWC Shutdown Controller + +maintainers: + - Claudiu Beznea + +description: | + Microchip AT91 SHDWC shutdown controller controls the power supplies VDDIO + and VDDCORE and the wake-up detection on debounced input lines. + +properties: + compatible: + oneOf: + - items: + - const: microchip,sama7g5-shdwc + - const: syscon + - enum: + - atmel,sama5d2-shdwc + - microchip,sam9x60-shdwc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + debounce-delay-us: + description: + Minimum wake-up inputs debouncer period in microseconds. It is usually a + board-related property. + + atmel,wakeup-rtc-timer: + description: enable real-time clock wake-up + type: boolean + + atmel,wakeup-rtt-timer: + description: enable real-time timer wake-up + type: boolean + +patternProperties: + "^input@[0-15]$": + description: + Wake-up input nodes. These are usually described in the "board" part of + the Device Tree. Note also that input 0 is linked to the wake-up pin and + is frequently used. + type: object + properties: + reg: + description: contains the wake-up input index + minimum: 0 + maximum: 15 + + atmel,wakeup-active-high: + description: + The corresponding wake-up input described by the child forces the + wake-up of the core power supply on a high level. The default is to + be active low. + type: boolean + + required: + - reg + + additionalProperties: false + +required: + - compatible + - reg + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: atmel,sama5d2-shdwc + then: + properties: + atmel,wakeup-rtt-timer: false + +additionalProperties: false + +examples: + - | + shdwc: poweroff@f8048010 { + compatible = "atmel,sama5d2-shdwc"; + reg = <0xf8048010 0x10>; + clocks = <&clk32k>; + #address-cells = <1>; + #size-cells = <0>; + atmel,wakeup-rtc-timer; + debounce-delay-us = <976>; + + input@0 { + reg = <0>; + }; + + input@1 { + reg = <1>; + atmel,wakeup-active-high; + }; + }; + +...