From patchwork Mon Jul 10 13:30:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 13307146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11829EB64DA for ; Mon, 10 Jul 2023 13:31:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9kaR1qHYiuyIZ5xA+sKqUOoU+vymXLuGZLbkLUKOlxU=; b=pqQqMRxIwcTpPg WMlYDza+T+9IVATkzDIhUTApEYIqKxdGOaN5Qbdtbvw7fjEy/hvx178U0QYZjn2HeWKD0wp4uvssI oZrB3MDO1xJ7IAXk4U5Uf54m8gJ+my5GYp8s6RzYbGGSHoNk6/H2QA2ZF2/9urfSELt+tthxllqgw ygz7vYQaLc+PW5WY0A/aCCbLQm3xb2P4R6cKnNXPQErKsrNzvNFFl/i39D8GtXa6mwfTNJtQizdmk 2fIdP1jO8xrMX/ZQNxuF+7yD/G/motvoXu3ep7BXdYCLE4MB8dn80HF7leoxtIO/3F9FxK8av8DRN 7TMHxIXn4KOt+EgYqapA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qIqz9-00BlKu-0j; Mon, 10 Jul 2023 13:31:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qIqz5-00BlJi-35 for linux-arm-kernel@lists.infradead.org; Mon, 10 Jul 2023 13:31:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 58294D75; Mon, 10 Jul 2023 06:32:04 -0700 (PDT) Received: from e127643.arm.com (unknown [10.57.30.85]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3DD263F67D; Mon, 10 Jul 2023 06:31:19 -0700 (PDT) From: James Clark To: linux-perf-users@vger.kernel.org, irogers@google.com, renyu.zj@linux.alibaba.com, john.g.garry@oracle.com Cc: James Clark , Will Deacon , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Suzuki K Poulose , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org Subject: [PATCH 2/4] perf jevents: Match on highest version of Arm json file available Date: Mon, 10 Jul 2023 14:30:53 +0100 Message-Id: <20230710133058.1483610-2-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230710133058.1483610-1-james.clark@arm.com> References: <20230710133058.1483610-1-james.clark@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230710_063124_089652_98611867 X-CRM114-Status: GOOD ( 25.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently version and revision fields are masked out of the MIDR so there can only be one set of jsons per CPU. In a later commit multiple revisions of Neoverse N2 json files will be provided. The highest valid version of json files should be used, but to make this work the mapfile has to be reverse sorted on the CPUID field so that the highest is found first. It's possible, but error prone, to do this manually so instead add an explicit sort into jevents.py. If the CPUID is a string then the rows are string sorted rather than numerically. Signed-off-by: James Clark --- tools/perf/arch/arm64/util/header.c | 61 ++++++++++++++++++++++------- tools/perf/pmu-events/jevents.py | 49 ++++++++++++----------- tools/perf/tests/pmu-events.c | 34 ++++++++++++++++ 3 files changed, 108 insertions(+), 36 deletions(-) diff --git a/tools/perf/arch/arm64/util/header.c b/tools/perf/arch/arm64/util/header.c index 80b9f6287fe2..637ad21721c2 100644 --- a/tools/perf/arch/arm64/util/header.c +++ b/tools/perf/arch/arm64/util/header.c @@ -1,3 +1,6 @@ +#include +#include +#include #include #include #include @@ -10,14 +13,12 @@ #define MIDR "/regs/identification/midr_el1" #define MIDR_SIZE 19 -#define MIDR_REVISION_MASK 0xf -#define MIDR_VARIANT_SHIFT 20 -#define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT) +#define MIDR_REVISION_MASK GENMASK(3, 0) +#define MIDR_VARIANT_MASK GENMASK(23, 20) static int _get_cpuid(char *buf, size_t sz, struct perf_cpu_map *cpus) { const char *sysfs = sysfs__mountpoint(); - u64 midr = 0; int cpu; if (!sysfs || sz < MIDR_SIZE) @@ -44,21 +45,11 @@ static int _get_cpuid(char *buf, size_t sz, struct perf_cpu_map *cpus) } fclose(file); - /* Ignore/clear Variant[23:20] and - * Revision[3:0] of MIDR - */ - midr = strtoul(buf, NULL, 16); - midr &= (~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK)); - scnprintf(buf, MIDR_SIZE, "0x%016lx", midr); /* got midr break loop */ break; } perf_cpu_map__put(cpus); - - if (!midr) - return EINVAL; - return 0; } @@ -99,3 +90,45 @@ char *get_cpuid_str(struct perf_pmu *pmu) return buf; } + + +int strcmp_cpuid_str(const char *mapcpuid, const char *idstr) +{ + u64 map_id = strtoull(mapcpuid, NULL, 16); + char map_id_variant = FIELD_GET(MIDR_VARIANT_MASK, map_id); + char map_id_revision = FIELD_GET(MIDR_REVISION_MASK, map_id); + u64 id = strtoull(idstr, NULL, 16); + char id_variant = FIELD_GET(MIDR_VARIANT_MASK, id); + char id_revision = FIELD_GET(MIDR_REVISION_MASK, id); + u64 id_fields = ~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK); + + /* Compare without version first */ + if ((map_id & id_fields) != (id & id_fields)) + return 1; + + /* + * ID matches, now compare version. + * + * Arm revisions (like r0p0) are compared here like two digit semver + * values eg. 1.3 < 2.0 < 2.1 < 2.2. The events json file with the + * highest matching version is used. + * + * r = high value = 'Variant' field in MIDR + * p = low value = 'Revision' field in MIDR + * + * Because the Variant field is further to the left, iterating through a + * reverse sorted mapfile.csv gives the correct comparison behavior. + * This relies on jevents.py sorting the list in print_mapping_table(). + */ + if (id_variant > map_id_variant) + return 0; + + if (id_variant == map_id_variant && id_revision >= map_id_revision) + return 0; + + /* + * variant is less than mapfile variant or variants are the same but + * the revision doesn't match. Return no match. + */ + return 1; +} diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 12e80bb7939b..c6a848f8d93a 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -620,28 +620,34 @@ const struct pmu_events_map pmu_events_map[] = { }, """) else: + def int_or_string_key(row): + try: + return int(row[0], 0) + except: + return row[0] with open(f'{_args.starting_dir}/{arch}/mapfile.csv') as csvfile: - table = csv.reader(csvfile) - first = True - for row in table: - # Skip the first row or any row beginning with #. - if not first and len(row) > 0 and not row[0].startswith('#'): - event_tblname = file_name_to_table_name('pmu_events_', [], row[2].replace('/', '_')) - if event_tblname in _event_tables: - event_size = f'ARRAY_SIZE({event_tblname})' - else: - event_tblname = 'NULL' - event_size = '0' - metric_tblname = file_name_to_table_name('pmu_metrics_', [], row[2].replace('/', '_')) - if metric_tblname in _metric_tables: - metric_size = f'ARRAY_SIZE({metric_tblname})' - else: - metric_tblname = 'NULL' - metric_size = '0' - if event_size == '0' and metric_size == '0': - continue - cpuid = row[0].replace('\\', '\\\\') - _args.output_file.write(f"""{{ + table = [row for row in csv.reader(csvfile)] + # Strip the first row or any row beginning with #. + table = [row for row in table[1:] if len(row) > 0 and not row[0].startswith('#')] + # Sort on CPUID field for predictable >= version comparisons later on + table = sorted(table, key=int_or_string_key, reverse=True) + for row in table: + event_tblname = file_name_to_table_name('pmu_events_', [], row[2].replace('/', '_')) + if event_tblname in _event_tables: + event_size = f'ARRAY_SIZE({event_tblname})' + else: + event_tblname = 'NULL' + event_size = '0' + metric_tblname = file_name_to_table_name('pmu_metrics_', [], row[2].replace('/', '_')) + if metric_tblname in _metric_tables: + metric_size = f'ARRAY_SIZE({metric_tblname})' + else: + metric_tblname = 'NULL' + metric_size = '0' + if event_size == '0' and metric_size == '0': + continue + cpuid = row[0].replace('\\', '\\\\') + _args.output_file.write(f"""{{ \t.arch = "{arch}", \t.cpuid = "{cpuid}", \t.event_table = {{ @@ -654,7 +660,6 @@ const struct pmu_events_map pmu_events_map[] = { \t}} }}, """) - first = False _args.output_file.write("""{ \t.arch = 0, diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index 64383fc34ef1..e730d4792bbe 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -14,6 +14,7 @@ #include "util/evlist.h" #include "util/expr.h" #include "util/hashmap.h" +#include "util/header.h" #include "util/parse-events.h" #include "metricgroup.h" #include "stat.h" @@ -1027,6 +1028,38 @@ static int test__parsing_threshold(struct test_suite *test __maybe_unused, return pmu_for_each_sys_metric(test__parsing_threshold_callback, NULL); } +static int test__cpuid_match(struct test_suite *test __maybe_unused, + int subtest __maybe_unused) +{ +#ifdef __aarch64__ + /* midr with no leading zeros matches */ + if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410fd0c0")) + return -1; + /* Upper case matches */ + if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410FD0C0")) + return -1; + /* r0p0 = r0p0 matches */ + if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd480")) + return -1; + /* r0p1 > r0p0 matches */ + if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd481")) + return -1; + /* r1p0 > r0p0 matches*/ + if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000411fd480")) + return -1; + /* r0p0 < r0p1 doesn't match */ + if (!strcmp_cpuid_str("0x00000000410fd481", "0x00000000410fd480")) + return -1; + /* r0p0 < r1p0 doesn't match */ + if (!strcmp_cpuid_str("0x00000000411fd480", "0x00000000410fd480")) + return -1; + /* Different CPU doesn't match */ + if (!strcmp_cpuid_str("0x00000000410fd4c0", "0x00000000430f0af0")) + return -1; +#endif + return 0; +} + static struct test_case pmu_events_tests[] = { TEST_CASE("PMU event table sanity", pmu_event_table), TEST_CASE("PMU event map aliases", aliases), @@ -1034,6 +1067,7 @@ static struct test_case pmu_events_tests[] = { "some metrics failed"), TEST_CASE("Parsing of PMU event table metrics with fake PMUs", parsing_fake), TEST_CASE("Parsing of metric thresholds with fake PMUs", parsing_threshold), + TEST_CASE("CPUID matching", cpuid_match), { .name = NULL, } };