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Thu, 13 Jul 2023 07:39:58 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a208:4984:5087:308e:21ca]) by smtp.gmail.com with ESMTPSA id d18-20020aa78692000000b0067a50223e44sm5565764pfo.74.2023.07.13.07.39.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Jul 2023 07:39:58 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Jagan Teki Subject: [PATCH 5/8] arm64: dts: rockchip: Enable RTC for edgeble-neu6b Date: Thu, 13 Jul 2023 20:09:38 +0530 Message-Id: <20230713143941.1756849-5-jagan@edgeble.ai> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230713143941.1756849-1-jagan@edgeble.ai> References: <20230713143941.1756849-1-jagan@edgeble.ai> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230713_074001_767205_BB1EE092 X-CRM114-Status: GOOD ( 11.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add RTC support for Edgeble Neu6B NCM IO board. Signed-off-by: Jagan Teki --- .../dts/rockchip/rk3588-edgeble-neu6b-io.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts index 0b6f32e9b820..4a9f85d7542a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts @@ -25,6 +25,30 @@ &combphy0_ps { status = "okay"; }; +&i2c6 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + interrupt-parent = <&gpio0>; + interrupts = ; + wakeup-source; + }; +}; + +&pinctrl { + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + &sata0 { status = "okay"; };