| Message ID | 20230731142150.3186650-1-m.felsch@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] clk: imx8mp: fix sai4 clock | expand |
+Cc linux-imx@nxp.com On 23-07-31, Marco Felsch wrote: > The reference manual don't mention a SAI4 hardware block. This would be > clock slice 78 which is skipped (TRM, page 237). Remove any reference to > this clock to align the driver with the reality. > > Fixes: 9c140d992676 ("clk: imx: Add support for i.MX8MP clock driver") > Acked-by: Stephen Boyd <sboyd@kernel.org> > Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> > --- > Changelog: > > v2: > - rebase to v6.5-rc1 > > drivers/clk/imx/clk-imx8mp.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c > index 1469249386dd8..670aa2bab3017 100644 > --- a/drivers/clk/imx/clk-imx8mp.c > +++ b/drivers/clk/imx/clk-imx8mp.c > @@ -178,10 +178,6 @@ static const char * const imx8mp_sai3_sels[] = {"osc_24m", "audio_pll1_out", "au > "video_pll1_out", "sys_pll1_133m", "osc_hdmi", > "clk_ext3", "clk_ext4", }; > > -static const char * const imx8mp_sai4_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out", > - "video_pll1_out", "sys_pll1_133m", "osc_hdmi", > - "clk_ext1", "clk_ext2", }; > - > static const char * const imx8mp_sai5_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out", > "video_pll1_out", "sys_pll1_133m", "osc_hdmi", > "clk_ext2", "clk_ext3", }; > @@ -567,7 +563,6 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) > hws[IMX8MP_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mp_sai1_sels, ccm_base + 0xa580); > hws[IMX8MP_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mp_sai2_sels, ccm_base + 0xa600); > hws[IMX8MP_CLK_SAI3] = imx8m_clk_hw_composite("sai3", imx8mp_sai3_sels, ccm_base + 0xa680); > - hws[IMX8MP_CLK_SAI4] = imx8m_clk_hw_composite("sai4", imx8mp_sai4_sels, ccm_base + 0xa700); > hws[IMX8MP_CLK_SAI5] = imx8m_clk_hw_composite("sai5", imx8mp_sai5_sels, ccm_base + 0xa780); > hws[IMX8MP_CLK_SAI6] = imx8m_clk_hw_composite("sai6", imx8mp_sai6_sels, ccm_base + 0xa800); > hws[IMX8MP_CLK_ENET_QOS] = imx8m_clk_hw_composite("enet_qos", imx8mp_enet_qos_sels, ccm_base + 0xa880); > -- > 2.39.2 > > >
On Mon, 31 Jul 2023 16:21:49 +0200, Marco Felsch wrote: > The reference manual don't mention a SAI4 hardware block. This would be > clock slice 78 which is skipped (TRM, page 237). Remove any reference to > this clock to align the driver with the reality. > > Applied, thanks! [1/2] clk: imx8mp: fix sai4 clock commit: c30f600f1f41dcf5ef0fb02e9a201f9b2e8f31bd [2/2] dt-bindings: clocks: imx8mp: make sai4 a dummy clock commit: 35ec2abb54726e1a72c570f6465811e049d81cbc Best regards,
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 1469249386dd8..670aa2bab3017 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -178,10 +178,6 @@ static const char * const imx8mp_sai3_sels[] = {"osc_24m", "audio_pll1_out", "au "video_pll1_out", "sys_pll1_133m", "osc_hdmi", "clk_ext3", "clk_ext4", }; -static const char * const imx8mp_sai4_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out", - "video_pll1_out", "sys_pll1_133m", "osc_hdmi", - "clk_ext1", "clk_ext2", }; - static const char * const imx8mp_sai5_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out", "video_pll1_out", "sys_pll1_133m", "osc_hdmi", "clk_ext2", "clk_ext3", }; @@ -567,7 +563,6 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) hws[IMX8MP_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mp_sai1_sels, ccm_base + 0xa580); hws[IMX8MP_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mp_sai2_sels, ccm_base + 0xa600); hws[IMX8MP_CLK_SAI3] = imx8m_clk_hw_composite("sai3", imx8mp_sai3_sels, ccm_base + 0xa680); - hws[IMX8MP_CLK_SAI4] = imx8m_clk_hw_composite("sai4", imx8mp_sai4_sels, ccm_base + 0xa700); hws[IMX8MP_CLK_SAI5] = imx8m_clk_hw_composite("sai5", imx8mp_sai5_sels, ccm_base + 0xa780); hws[IMX8MP_CLK_SAI6] = imx8m_clk_hw_composite("sai6", imx8mp_sai6_sels, ccm_base + 0xa800); hws[IMX8MP_CLK_ENET_QOS] = imx8m_clk_hw_composite("enet_qos", imx8mp_enet_qos_sels, ccm_base + 0xa880);
The reference manual don't mention a SAI4 hardware block. This would be clock slice 78 which is skipped (TRM, page 237). Remove any reference to this clock to align the driver with the reality. Fixes: 9c140d992676 ("clk: imx: Add support for i.MX8MP clock driver") Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> --- Changelog: v2: - rebase to v6.5-rc1 drivers/clk/imx/clk-imx8mp.c | 5 ----- 1 file changed, 5 deletions(-)