From patchwork Wed Aug 2 17:26:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Easwar Hariharan X-Patchwork-Id: 13338624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32B0FC001E0 for ; Wed, 2 Aug 2023 17:27:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=g+Am9G+84yN1vSx2d+qfeo+Wy735IkbWS27++fF1EyU=; b=egry3qCjLn/nuk yW6CMC/3I6DnutpOW6Mq461SSPO4nfY1UHnz5ttGzNzsWcrpYzsSSbO18WMfoTRq/kFPXGQ4UldO4 dUjU3qS7nCnPvvxHd4sDzjJdTclHNvfB7AZ7Tm7PWODmAchoOy4EPvdaeYbvm4rRpsavCQ2B/gsgk aDCB4Q+mK2zxxs2Yf/UN8cUugCzeg9r4ZwrZoeF+XDq8wEQPo/W2qNwV1XBQhQoIsgS9LTl5J6PTP FFh/UX5USuBUaagveLi4UqWKUeUWsb80vNa+z8SEaKbbB1Rlu0fH5qIf9aZYGwWIXQCkIZRjwuoda XPYU8yl+cM0bMfa8qqow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcR-005VV3-30; Wed, 02 Aug 2023 17:26:43 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcP-005VSj-1E for linux-arm-kernel@lists.infradead.org; Wed, 02 Aug 2023 17:26:42 +0000 Received: from rrs24-12-35.corp.microsoft.com (unknown [131.107.147.181]) by linux.microsoft.com (Postfix) with ESMTPSA id 09BB3238C432; Wed, 2 Aug 2023 10:26:41 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 09BB3238C432 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1690997201; bh=veFcr7QIuujJbF+cPPo/BT02ofZ8XtwDGisaF+dPAVs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gdZywKBXcJCK6VmK09jSnkr53SbRVbm33OMn7ckJ1BFTax9jOLcoSlRWx3mRAqoaO +Lk5pOWEnmpGqJC+aNFs+H97H1eY6aSs7fD8xuACXB7oNVbKJjHIlYm8vK1aypl0b7 UvAsS+vajWhqUPbUxPhM6RI7Gem9Eq6KQz5i+8jc= From: Easwar Hariharan To: stable@vger.kernel.org Cc: easwar.hariharan@microsoft.com, Robin Murphy , Nicolin Chen , Will Deacon , Joerg Roedel , Lu Baolu , Jean-Philippe Brucker , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Vladimir Oltean , Yicong Yang , Tomas Krcka , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 6.4 3/4] iommu/arm-smmu-v3: Add explicit feature for nesting Date: Wed, 2 Aug 2023 17:26:19 +0000 Message-Id: <20230802172620.1628017-4-eahariha@linux.microsoft.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802172620.1628017-1-eahariha@linux.microsoft.com> References: <20230802172620.1628017-1-eahariha@linux.microsoft.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_102641_445128_728C3DE9 X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Robin Murphy commit 1d9777b9f3d55b4b6faf186ba4f1d6fb560c0523 upstream In certain cases we may want to refuse to allow nested translation even when both stages are implemented, so let's add an explicit feature for nesting support which we can control in its own right. For now this merely serves as documentation, but it means a nice convenient check will be ready and waiting for the future nesting code. Signed-off-by: Robin Murphy Reviewed-by: Nicolin Chen Link: https://lore.kernel.org/r/136c3f4a3a84cc14a5a1978ace57dfd3ed67b688.1683731256.git.robin.murphy@arm.com Signed-off-by: Will Deacon Signed-off-by: Easwar Hariharan --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 ++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b0ccd735f8bb..7e08ec55df2a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3674,6 +3674,10 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu->ias = max(smmu->ias, smmu->oas); + if ((smmu->features & ARM_SMMU_FEAT_TRANS_S1) && + (smmu->features & ARM_SMMU_FEAT_TRANS_S2)) + smmu->features |= ARM_SMMU_FEAT_NESTING; + arm_smmu_device_iidr_probe(smmu); if (arm_smmu_sva_supported(smmu)) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 1555c8220381..dcab85698a4e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -645,6 +645,7 @@ struct arm_smmu_device { #define ARM_SMMU_FEAT_BTM (1 << 16) #define ARM_SMMU_FEAT_SVA (1 << 17) #define ARM_SMMU_FEAT_E2H (1 << 18) +#define ARM_SMMU_FEAT_NESTING (1 << 19) u32 features; #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0)