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Tue, 8 Aug 2023 18:19:38 +0200 From: Valentin Caron To: Greg Kroah-Hartman CC: Jiri Slaby , Alexandre Torgue , Amelie Delaunay , , , , , Valentin Caron Subject: [PATCH v2 2/6] serial: stm32: use DMAT as a configuration bit Date: Tue, 8 Aug 2023 18:19:02 +0200 Message-ID: <20230808161906.178996-3-valentin.caron@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230808161906.178996-1-valentin.caron@foss.st.com> References: <20230808161906.178996-1-valentin.caron@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.168] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To EQNDAG1NODE4.st.com (10.75.129.133) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-08_15,2023-08-08_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230808_171948_152678_A42479C7 X-CRM114-Status: GOOD ( 14.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DMAT is a configuration bit so it should be set at the startup of uart port and not when a DMA transfer begins. This patch move set of DMAT into set_termios and remove DMAT reset except in shutdown. Signed-off-by: Valentin Caron --- drivers/tty/serial/stm32-usart.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 2f9672ba4ed3..a1585aa1ceb0 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -510,10 +510,8 @@ static void stm32_usart_tx_dma_complete(void *arg) { struct uart_port *port = arg; struct stm32_port *stm32port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; unsigned long flags; - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); stm32_usart_tx_dma_terminate(stm32port); /* Let's see if we have pending data to send */ @@ -602,7 +600,6 @@ static void stm32_usart_transmit_chars_pio(struct uart_port *port) static void stm32_usart_transmit_chars_dma(struct uart_port *port) { struct stm32_port *stm32port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; struct circ_buf *xmit = &port->state->xmit; struct dma_async_tx_descriptor *desc = NULL; unsigned int count; @@ -667,8 +664,6 @@ static void stm32_usart_transmit_chars_dma(struct uart_port *port) /* Issue pending DMA TX requests */ dma_async_issue_pending(stm32port->tx_ch); - stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT); - uart_xmit_advance(port, count); return; @@ -1270,6 +1265,9 @@ static void stm32_usart_set_termios(struct uart_port *port, cr3 |= USART_CR3_DDRE; } + if (stm32_port->tx_ch) + cr3 |= USART_CR3_DMAT; + if (rs485conf->flags & SER_RS485_ENABLED) { stm32_usart_config_reg_rs485(&cr1, &cr3, rs485conf->delay_rts_before_send,