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Fri, 11 Aug 2023 05:47:52 -0500 From: Jai Luthra To: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Tomi Valkeinen CC: , , , , Laurent Pinchart , Mauro Carvalho Chehab , Maxime Ripard , , Benoit Parrot , Vaishnav Achath , Vignesh Raghavendra , , , , , Martyn Welch , Julien Massot Subject: [PATCH v9 09/13] media: cadence: csi2rx: Fix stream data configuration Date: Fri, 11 Aug 2023 16:17:31 +0530 Message-ID: <20230811-upstream_csi-v9-9-8943f7a68a81@ti.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811-upstream_csi-v9-0-8943f7a68a81@ti.com> References: <20230811-upstream_csi-v9-0-8943f7a68a81@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2122; i=j-luthra@ti.com; h=from:subject:message-id; bh=RlcrrehLFe+hG3TiUpTHm5QtZkOc/RxB0DZpu5hgOzE=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk1g8FkvbYM1oPinCX7J7OhxCS6I4Q32BaAUX3m HTvoux/tjaJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNYPBQAKCRBD3pH5JJpx RWGLD/9W3wJCa9x6e8TacMw3ePUHN9NEVN0ffLIPBHKAOSf8tPLdSWwRvCcBatlBIohLpWEiTeG LgDVZNEom4Vii82olxMzUHJCjHkkXtijEk01G4j37N+leDZhgNTjVEWFOQBlz6nFeT5I2FpJZV0 iPcpR5lPewxr0XE/EOMaboLjsEODH0e2oCXGup7d52hprmgOq7jcSmlJ9md36Ul5EJZX1cdk+HL TprUswGRCuF4xevBBu3x62KOo/3CsQbUQ/W8WkHoWkvnQCK8Ka+cE8Al7ajrDuoD6RURCfOcVAx blRxWsPBMZ9dSvvDOuyEQCkm8kN5mDiwfrxZIapAXhMUGZEnjFzDZi9Uhw/n6C7GP+DS1pN5Xgt 0BB9t+/9Nyfcodk8kMdqqAsOHU1pNAGsR75txf/vrXIZuTD0rbDTqI+Eh19vOs2fr1Se6sP75Vg IiXwM+LqBMsCWO3Vxp1QQtB05tDuGazqsBL5LAZzzgz/x2AGNV21xgfc6VA4XoT9x9J50qX1/gz HbO4SEVhy9ZM4ai0Vt+LL9BKfvoX2QRwS3J+6Vz7S5Vk3Azp9EXmNPCme74ELPDk3DItnXu86WU a8+9kN3LUZ5cqDpfnzJwFXIioIBEZdzB5btZbTtlPXOQ3t+JNYJlmLvnVlKu6RIOgg3JeVuyziN Smo5A+6kBd7vTnA== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230811_034812_839199_96AC21C7 X-CRM114-Status: GOOD ( 14.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Pratyush Yadav Firstly, there is no VC_EN bit present in the STREAM_DATA_CFG register. Bit 31 is part of the VL_SELECT field. Remove it completely. Secondly, it makes little sense to enable ith virtual channel for ith stream. Sure, there might be a use-case that demands it. But there might also be a use case that demands all streams to use the 0th virtual channel. Prefer this case over the former because it is less arbitrary and also makes it very clear what the limitations of the current driver is instead of giving a false impression that multiple virtual channels are supported. Signed-off-by: Pratyush Yadav Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Reviewed-by: Maxime Ripard Signed-off-by: Jai Luthra --- drivers/media/platform/cadence/cdns-csi2rx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c index f8205c3a28c0..46effbbe580d 100644 --- a/drivers/media/platform/cadence/cdns-csi2rx.c +++ b/drivers/media/platform/cadence/cdns-csi2rx.c @@ -49,7 +49,6 @@ #define CSI2RX_STREAM_STATUS_RDY BIT(31) #define CSI2RX_STREAM_DATA_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x008) -#define CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT BIT(31) #define CSI2RX_STREAM_DATA_CFG_VC_SELECT(n) BIT((n) + 16) #define CSI2RX_STREAM_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x00c) @@ -271,8 +270,11 @@ static int csi2rx_start(struct csi2rx_priv *csi2rx) writel(CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF, csi2rx->base + CSI2RX_STREAM_CFG_REG(i)); - writel(CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT | - CSI2RX_STREAM_DATA_CFG_VC_SELECT(i), + /* + * Enable one virtual channel. When multiple virtual channels + * are supported this will have to be changed. + */ + writel(CSI2RX_STREAM_DATA_CFG_VC_SELECT(0), csi2rx->base + CSI2RX_STREAM_DATA_CFG_REG(i)); writel(CSI2RX_STREAM_CTRL_START,