From patchwork Tue Aug 15 14:06:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 13353834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DF03C0015E for ; Tue, 15 Aug 2023 14:07:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=BhbnhxRZ9O+89eHwjQIKxMhmwHOnsNtMDtO2JJNviFc=; b=V27su2CwHOF49i MBXlA6E9QlC+A/3qhlAL14dEtw3K2Sc9Hp2yPQ5d0kYb/xDQSS5VVmscq/jrGQJyF5uYNI03zU+Z/ aBmCcrkoabcRxFN1xpY+DlB8KbyMPY0fAjvdk+a7P5i0HaJ/hg88oSlGXxPUZRydBB5PsYaYrymIF qhb+z6B83Ftuxbxs5HyUKgYSIpBQloOpSpDxE6CmPkcgKCx3Q4Pm2C/pQDmbqu7Dt42TOlT1E0fRL b/qUswYR1EWuhg+tNQslU8Po39zq09pw4d/e6DILJU5tXvaeaIUgsjTzoDSHGeJ+wX0s+OHI9KWDC Mav2Rmr7zImoWHs2zOAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qVuhO-001jjr-1Y; Tue, 15 Aug 2023 14:07:06 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qVuhL-001jiw-1g for linux-arm-kernel@lists.infradead.org; Tue, 15 Aug 2023 14:07:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 376701063; Tue, 15 Aug 2023 07:07:33 -0700 (PDT) Received: from e127643.arm.com (unknown [10.57.2.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 109593F6C4; Tue, 15 Aug 2023 07:06:48 -0700 (PDT) From: James Clark To: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, will@kernel.org, anshuman.khandual@arm.com Cc: James Clark , Catalin Marinas , Mark Brown , James Morse , Kristina Martsenko , Rob Herring , Jintack Lim , linux-kernel@vger.kernel.org Subject: [PATCH] arm64: sysreg: Generate C compiler warnings on {read,write}_sysreg_s arguments Date: Tue, 15 Aug 2023 15:06:39 +0100 Message-Id: <20230815140639.614769-1-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230815_070703_644623_166B4D73 X-CRM114-Status: GOOD ( 10.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Evaluate the register before the asm section so that the C compiler generates warnings when there is an issue with the register argument. This will prevent possible future issues such as the one seen here [1] where a missing bracket caused the shift and addition operators to be evaluated in the wrong order, but no warning was emitted. The GNU assembler has no warning for when expressions evaluate differently to C due to different operator precedence, but the C compiler has some warnings that may suggest something is wrong. For example in this case the following warning would have been emitted: error: operator '>>' has lower precedence than '+'; '+' will be evaluated first [-Werror,-Wshift-op-parentheses] There are currently no existing warnings that need to be fixed. [1]: https://lore.kernel.org/linux-perf-users/20230728162011.GA22050@willie-the-truck/ Signed-off-by: James Clark --- arch/arm64/include/asm/sysreg.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 0c07b03d511f..71eb8ea7c795 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -777,15 +777,21 @@ /* * For registers without architectural names, or simply unsupported by * GAS. + * + * __check_r forces warnings to be generated by the compiler when + * evaluating r which wouldn't normally happen due to being passed to + * the assembler via __stringify(r). */ #define read_sysreg_s(r) ({ \ u64 __val; \ + u32 __maybe_unused __check_r = (u32)(r); \ asm volatile(__mrs_s("%0", r) : "=r" (__val)); \ __val; \ }) #define write_sysreg_s(v, r) do { \ u64 __val = (u64)(v); \ + u32 __maybe_unused __check_r = (u32)(r); \ asm volatile(__msr_s(r, "%x0") : : "rZ" (__val)); \ } while (0)