diff mbox series

[RFC,05/12] fs/resctrl: Set-up downstream priority partition resources

Message ID 20230815152712.1760046-6-amitsinght@marvell.com (mailing list archive)
State New, archived
Headers show
Series ARM: MPAM: add support for priority partitioning control | expand

Commit Message

Amit Singh Tomar Aug. 15, 2023, 3:27 p.m. UTC
Upon resource control group creation, Cache portion bitmap, and Memory
bandwidth allocation gets initialized to the default/maximum values,
obtained from resource control code.

Let's replicate it for priority partition resource, and setup the default
downstream priority value.

Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com>
---
 drivers/platform/mpam/mpam_resctrl.c |  4 +++-
 fs/resctrl/rdtgroup.c                | 30 ++++++++++++++++++++++++++++
 include/linux/resctrl.h              |  4 ++++
 3 files changed, 37 insertions(+), 1 deletion(-)

Comments

Fenghua Yu Aug. 17, 2023, 5:39 p.m. UTC | #1
Hi, Amit,

On 8/15/23 08:27, Amit Singh Tomar wrote:
> Upon resource control group creation, Cache portion bitmap, and Memory
> bandwidth allocation gets initialized to the default/maximum values,
> obtained from resource control code.
> 
> Let's replicate it for priority partition resource, and setup the default
> downstream priority value.
> 
> Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com>
> ---
>   drivers/platform/mpam/mpam_resctrl.c |  4 +++-
>   fs/resctrl/rdtgroup.c                | 30 ++++++++++++++++++++++++++++
>   include/linux/resctrl.h              |  4 ++++
>   3 files changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c
> index 1081ceac41a8..cc843f1b0fb7 100644
> --- a/drivers/platform/mpam/mpam_resctrl.c
> +++ b/drivers/platform/mpam/mpam_resctrl.c
> @@ -733,8 +733,10 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res)
>   			exposed_alloc_capable = true;
>   		}
>   
> -		if (has_ppart)
> +		if (has_ppart) {
>   			r->priority_cap = true;
> +			r->dspri_default_ctrl = BIT_MASK(class->props.dspri_wd) - 1;
> +		}
>   
>   		/*
>   		 * MBWU counters may be 'local' or 'total' depending on where
> diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c
> index 9c5dfaaa7fa2..bc5fb246ba68 100644
> --- a/fs/resctrl/rdtgroup.c
> +++ b/fs/resctrl/rdtgroup.c
> @@ -3045,6 +3045,21 @@ static int rdtgroup_init_cat(struct resctrl_schema *s, u32 closid)
>   	return 0;
>   }
>   
> +static int rdtgroup_init_dspri(struct rdt_resource *r, u32 closid)
> +{
> +	struct resctrl_staged_config *cfg;
> +	struct rdt_domain *d;
> +
> +	list_for_each_entry(d, &r->domains, list) {
> +		cfg = &d->staged_config[CDP_NONE];
> +		cfg->new_ctrl = r->dspri_default_ctrl;
> +		cfg->have_new_ctrl = true;
> +		r->dspri_store = true;
> +	}
> +
> +	return 0;
> +}
> +
>   /* Initialize MBA resource with default values. */
>   static void rdtgroup_init_mba(struct rdt_resource *r, u32 closid)
>   {
> @@ -3082,12 +3097,27 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp)
>   				return ret;
>   		}
>   
> +		if (r->priority_cap)
> +			r->dspri_store = false;
> +
>   		ret = resctrl_arch_update_domains(r, rdtgrp->closid);
>   		if (ret < 0) {
>   			rdt_last_cmd_puts("Failed to initialize allocations\n");
>   			return ret;
>   		}
>   
> +		if (r->priority_cap) {
> +			ret = rdtgroup_init_dspri(r, rdtgrp->closid);
> +			if (ret < 0)
> +				return ret;
> +
> +			ret = resctrl_arch_update_domains(r, rdtgrp->closid);
> +			if (ret < 0) {
> +				rdt_last_cmd_puts("Failed to initialize allocations\n");
> +				return ret;
> +			}
> +			r->dspri_store = false;
> +		}
>   	}
>   
>   	rdtgrp->mode = RDT_MODE_SHAREABLE;
> diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
> index a98ba5828211..d5b0661c0f70 100644
> --- a/include/linux/resctrl.h
> +++ b/include/linux/resctrl.h
> @@ -198,6 +198,7 @@ struct resctrl_membw {
>    * @alloc_capable:	Is allocation available on this machine
>    * @mon_capable:	Is monitor feature available on this machine
>    * @priority_capable:   Is priority partitioning feature available on this machine
> + * @dspri_store:

Please add description for this new field.

>    * @num_rmid:		Number of RMIDs available
>    * @cache_level:	Which cache level defines scope of this resource
>    * @cache:		Cache allocation related data
> @@ -206,6 +207,7 @@ struct resctrl_membw {
>    * @name:		Name to use in "schemata" file.
>    * @data_width:		Character width of data when displaying
>    * @default_ctrl:	Specifies default cache cbm or memory B/W percent.
> + * @dspri_default_ctrl: Specifies default downstream priority value.
>    * @format_str:		Per resource format string to show domain value
>    * @evt_list:		List of monitoring events
>    * @fflags:		flags to choose base and info files
> @@ -216,6 +218,7 @@ struct rdt_resource {
>   	bool			alloc_capable;
>   	bool			mon_capable;
>   	bool                    priority_cap;
> +	bool			dspri_store;
>   	int			num_rmid;
>   	int			cache_level;
>   	struct resctrl_cache	cache;
> @@ -224,6 +227,7 @@ struct rdt_resource {
>   	char			*name;
>   	int			data_width;
>   	u32			default_ctrl;
> +	u32			dspri_default_ctrl;
>   	const char		*format_str;
>   	struct list_head	evt_list;
>   	unsigned long		fflags;

Thanks.

-Fenghua
diff mbox series

Patch

diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c
index 1081ceac41a8..cc843f1b0fb7 100644
--- a/drivers/platform/mpam/mpam_resctrl.c
+++ b/drivers/platform/mpam/mpam_resctrl.c
@@ -733,8 +733,10 @@  static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res)
 			exposed_alloc_capable = true;
 		}
 
-		if (has_ppart)
+		if (has_ppart) {
 			r->priority_cap = true;
+			r->dspri_default_ctrl = BIT_MASK(class->props.dspri_wd) - 1;
+		}
 
 		/*
 		 * MBWU counters may be 'local' or 'total' depending on where
diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c
index 9c5dfaaa7fa2..bc5fb246ba68 100644
--- a/fs/resctrl/rdtgroup.c
+++ b/fs/resctrl/rdtgroup.c
@@ -3045,6 +3045,21 @@  static int rdtgroup_init_cat(struct resctrl_schema *s, u32 closid)
 	return 0;
 }
 
+static int rdtgroup_init_dspri(struct rdt_resource *r, u32 closid)
+{
+	struct resctrl_staged_config *cfg;
+	struct rdt_domain *d;
+
+	list_for_each_entry(d, &r->domains, list) {
+		cfg = &d->staged_config[CDP_NONE];
+		cfg->new_ctrl = r->dspri_default_ctrl;
+		cfg->have_new_ctrl = true;
+		r->dspri_store = true;
+	}
+
+	return 0;
+}
+
 /* Initialize MBA resource with default values. */
 static void rdtgroup_init_mba(struct rdt_resource *r, u32 closid)
 {
@@ -3082,12 +3097,27 @@  static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp)
 				return ret;
 		}
 
+		if (r->priority_cap)
+			r->dspri_store = false;
+
 		ret = resctrl_arch_update_domains(r, rdtgrp->closid);
 		if (ret < 0) {
 			rdt_last_cmd_puts("Failed to initialize allocations\n");
 			return ret;
 		}
 
+		if (r->priority_cap) {
+			ret = rdtgroup_init_dspri(r, rdtgrp->closid);
+			if (ret < 0)
+				return ret;
+
+			ret = resctrl_arch_update_domains(r, rdtgrp->closid);
+			if (ret < 0) {
+				rdt_last_cmd_puts("Failed to initialize allocations\n");
+				return ret;
+			}
+			r->dspri_store = false;
+		}
 	}
 
 	rdtgrp->mode = RDT_MODE_SHAREABLE;
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index a98ba5828211..d5b0661c0f70 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -198,6 +198,7 @@  struct resctrl_membw {
  * @alloc_capable:	Is allocation available on this machine
  * @mon_capable:	Is monitor feature available on this machine
  * @priority_capable:   Is priority partitioning feature available on this machine
+ * @dspri_store:
  * @num_rmid:		Number of RMIDs available
  * @cache_level:	Which cache level defines scope of this resource
  * @cache:		Cache allocation related data
@@ -206,6 +207,7 @@  struct resctrl_membw {
  * @name:		Name to use in "schemata" file.
  * @data_width:		Character width of data when displaying
  * @default_ctrl:	Specifies default cache cbm or memory B/W percent.
+ * @dspri_default_ctrl: Specifies default downstream priority value.
  * @format_str:		Per resource format string to show domain value
  * @evt_list:		List of monitoring events
  * @fflags:		flags to choose base and info files
@@ -216,6 +218,7 @@  struct rdt_resource {
 	bool			alloc_capable;
 	bool			mon_capable;
 	bool                    priority_cap;
+	bool			dspri_store;
 	int			num_rmid;
 	int			cache_level;
 	struct resctrl_cache	cache;
@@ -224,6 +227,7 @@  struct rdt_resource {
 	char			*name;
 	int			data_width;
 	u32			default_ctrl;
+	u32			dspri_default_ctrl;
 	const char		*format_str;
 	struct list_head	evt_list;
 	unsigned long		fflags;