@@ -117,7 +117,7 @@ &gpio1 {
"P2.24",
"P2.33",
"P2.22",
- "P2.18",
+ "P2.18 [PRU0.15i]",
"NC",
"NC",
"P2.01 [PWM1A]",
@@ -214,7 +214,7 @@ &am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
- &P2_33_gpio &P2_22_gpio &P2_18_gpio &P2_10_gpio
+ &P2_33_gpio &P2_22_gpio &P2_10_gpio
&P2_06_gpio &P2_04_gpio &P2_02_gpio &P2_08_gpio
&P2_17_gpio >;
@@ -272,15 +272,6 @@ AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7)
pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
};
- /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */
- P2_18_gpio: P2-18-gpio-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7)
- >;
- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
- };
-
/* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */
P2_10_gpio: P2-10-gpio-pins {
pinctrl-single,pins = <
@@ -406,6 +397,27 @@ AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
>;
};
+
+ pru0_pins: pinmux-pru0-pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE5)/* (D14) xdma_event_intr1.pr1_pru0_pru_r31_16 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE5)/* (A14) mcasp0_ahclkx.pr1_pru0_pru_r30_7 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (B12) mcasp0_acklr.pr1_pru0_pru_r30_4 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (B13) mcasp0_fsx.pr1_pru0_pru_r30_1 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE6) /* (U13) gpmc_ad15.pr1_pru0_pru_r31_15 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (D13) mcasp0_axr1.pr1_pru0_pru_r30_6 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE5)/* (C12) mcasp0_ahclkr.pr1_pru0_pru_r30_3 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (D12) mcasp0_axr0.pr1_pru0_pru_r30_2 */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (C13) mcasp0_fsr.pr1_pru0_pru_r30_5 */
+ >;
+ };
+
+ pru1_pins: pinmux-pru1-pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE5)/*(R6) lcd_ac_bias_en.pr1_pru1_pru_r30_11 */
+ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (V5) lcd_pclk.pr1_pru1_pru_r30_10 */
+ >;
+ };
};
&epwmss0 {
@@ -487,3 +499,17 @@ &usb0 {
&usb1 {
dr_mode = "host";
};
+
+&pruss_tm {
+ status = "okay";
+};
+
+&pru0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pru0_pins>;
+};
+
+&pru1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pru1_pins>;
+};
Now that the PRU code is upstream and can be loaded via remoteproc, adjust the device tree to enable it and adjust the pin muxing so that the default setting of the pins matches what's is given on the silkscreen and/or pocketbeagle wiring. Caveat: In most cases, the silkscreen will indicate, for example, "PRU0.7", but it doesn't indicate whether that pin should be enabled for input or output. On the PRU a different MODE is used for input versus output. So it is unclear which mode to enable (MODE5 = output, MODE6 = input). In cases where there is a choice (PRU1.11, PRU0.7, PRU0.4, PRU0.1, PRU1.10, PRU0.6, PRU0.3, PRU0.2, and PRU0.5) output is assumed (MODE5). The remaining PRU silkscreen pins do not have a choice and are set as follows: PRU0.16 MODE5 input PRU0.15i MODE6 input Signed-off-by: Trevor Woerner <twoerner@gmail.com> --- .../boot/dts/ti/omap/am335x-pocketbeagle.dts | 48 ++++++++++++++----- 1 file changed, 37 insertions(+), 11 deletions(-)