From patchwork Thu Aug 17 16:57:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 638B5C3DA66 for ; Thu, 17 Aug 2023 17:10:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=a4JEIYJXw9O24GJpkUGrlc9GLCr4PaS4ofTis2uFufk=; b=mh2LLk2iHmPJda oloieReaagVZPF1koSAA1+8e4vR/xMhLyOwAU518UjWsPIU4hehvNK+WhVrhhnFYWumh1KXZ69IoA 4LYPiLbq+iijMGydkfE/+RaHW57W/yB1P0Rj+0MyxvFAxCN0YxO9CaFeoox7ts09gNlj5fWTRweoI 8Si9aRrxzYA6Qt+v1m8QEuIoXJ18hof8my4oRV7WJzRUlClfO5YXpoAh7Yi4The6pl9XbvjmcDIDY ozIh63Imi3AD/26Um3WHCWiHZN0e2gqpSPbSjrv2rnUJejWVP1FEXksc7o74xrxg9j2E6/xem6W13 jubV1jvNfXbFPwhFg6XQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qWgVb-006qhC-34; Thu, 17 Aug 2023 17:10:07 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qWgVU-006qdd-0R for linux-arm-kernel@lists.infradead.org; Thu, 17 Aug 2023 17:10:01 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A760C675C5; Thu, 17 Aug 2023 17:09:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58620C433C8; Thu, 17 Aug 2023 17:09:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292199; bh=v5fyU7tg4Nnh4L70QOucdCfrXw036MbbJKXSnKFoTps=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H0zd0vYzj5RIm7r4P7jqUMcvizI3Uo6SZHTMtk6YIHNxScbD8HFahRYRfgSljP0Un aXAOML2bm9czAizJHttgDm0YypWO/YRsm4XgULiAvpxhLnhixTdqGUfNgFwnCqOqAk uFl+D48lx12pSqgo2DLXvX82GpQhhgUGa23AEGf1DgIAX9vfj8aPcuHhVjO2aZEQ75 UOgkhnOK4dHbbVOSTsfMx5EcWJCMobqno8ohLwVbq6xc0aJl96cmQ4ywoyP5Z102eI qNryxpTaNVxZQw9jpf30Kmu8r49lsMRqFYNRyk1Kw2vVdN1feFqb39qpYPH2Qqm+GB FMG+NYF2eZt4Q== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 8/9] dt-bindings: net: snps,dwmac: add per channel irq support Date: Fri, 18 Aug 2023 00:57:48 +0800 Message-Id: <20230817165749.672-9-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230817_101000_258979_2C1DA87C X-CRM114-Status: UNSURE ( 9.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The IP supports optional per channel interrupt, add support for this usage case. Signed-off-by: Jisheng Zhang --- .../devicetree/bindings/net/snps,dwmac.yaml | 68 ++++++++++++++++++- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index ee9174f77d97..a916701474dc 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -103,7 +103,7 @@ properties: interrupts: minItems: 1 - maxItems: 5 + maxItems: 37 additionalItems: true items: - description: Combined signal for various interrupt events @@ -111,10 +111,42 @@ properties: - description: The interrupt that occurs when Rx exits the LPI state - description: The interrupt that occurs when Safety Feature Correctible Errors happen - description: The interrupt that occurs when Safety Feature Uncorrectible Errors happen + - description: rx0 per-channel interrupt + - description: rx1 per-channel interrupt + - description: rx2 per-channel interrupt + - description: rx3 per-channel interrupt + - description: rx4 per-channel interrupt + - description: rx5 per-channel interrupt + - description: rx6 per-channel interrupt + - description: rx7 per-channel interrupt + - description: rx8 per-channel interrupt + - description: rx9 per-channel interrupt + - description: rx10 per-channel interrupt + - description: rx11 per-channel interrupt + - description: rx12 per-channel interrupt + - description: rx13 per-channel interrupt + - description: rx14 per-channel interrupt + - description: rx15 per-channel interrupt + - description: tx0 per-channel interrupt + - description: tx1 per-channel interrupt + - description: tx2 per-channel interrupt + - description: tx3 per-channel interrupt + - description: tx4 per-channel interrupt + - description: tx5 per-channel interrupt + - description: tx6 per-channel interrupt + - description: tx7 per-channel interrupt + - description: tx8 per-channel interrupt + - description: tx9 per-channel interrupt + - description: tx10 per-channel interrupt + - description: tx11 per-channel interrupt + - description: tx12 per-channel interrupt + - description: tx13 per-channel interrupt + - description: tx14 per-channel interrupt + - description: tx15 per-channel interrupt interrupt-names: minItems: 1 - maxItems: 5 + maxItems: 37 additionalItems: true items: - const: macirq @@ -123,6 +155,38 @@ properties: - eth_lpi - sfty_ce - sfty_ue + - rx0 + - rx1 + - rx2 + - rx3 + - rx4 + - rx5 + - rx6 + - rx7 + - rx8 + - rx9 + - rx10 + - rx11 + - rx12 + - rx13 + - rx14 + - rx15 + - tx0 + - tx1 + - tx2 + - tx3 + - tx4 + - tx5 + - tx6 + - tx7 + - tx8 + - tx9 + - tx10 + - tx11 + - tx12 + - tx13 + - tx14 + - tx15 clocks: minItems: 1