diff mbox series

[v2] ARM: dts: imx6qdl-gw5904: add internal mdio nodes

Message ID 20230828192615.1202078-1-tharvey@gateworks.com (mailing list archive)
State Accepted
Headers show
Series [v2] ARM: dts: imx6qdl-gw5904: add internal mdio nodes | expand

Commit Message

Tim Harvey Aug. 28, 2023, 7:26 p.m. UTC 
Complete the switch definition by adding the internal mdio nodes.

This does not change behavior on Linux but is required if the dt is used
for U-Boot which requires the internal PHY ports to be defined for
DSA.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v2: rebase and update commit log
---
 arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Shawn Guo Sept. 25, 2023, 12:50 a.m. UTC | #1 
On Mon, Aug 28, 2023 at 12:26:15PM -0700, Tim Harvey wrote:
> Complete the switch definition by adding the internal mdio nodes.
> 
> This does not change behavior on Linux but is required if the dt is used
> for U-Boot which requires the internal PHY ports to be defined for
> DSA.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
index 9594bc5745ed..3375b3fd8d4c 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
@@ -212,6 +212,27 @@  switch@0 {
 			compatible = "marvell,mv88e6085";
 			reg = <0>;
 
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				sw_phy0: ethernet-phy@0 {
+					reg = <0x0>;
+				};
+
+				sw_phy1: ethernet-phy@1 {
+					reg = <0x1>;
+				};
+
+				sw_phy2: ethernet-phy@2 {
+					reg = <0x2>;
+				};
+
+				sw_phy3: ethernet-phy@3 {
+					reg = <0x3>;
+				};
+			};
+
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -219,21 +240,29 @@  ports {
 				port@0 {
 					reg = <0>;
 					label = "lan4";
+					phy-handle = <&sw_phy0>;
+					phy-mode = "internal";
 				};
 
 				port@1 {
 					reg = <1>;
 					label = "lan3";
+					phy-handle = <&sw_phy1>;
+					phy-mode = "internal";
 				};
 
 				port@2 {
 					reg = <2>;
 					label = "lan2";
+					phy-handle = <&sw_phy2>;
+					phy-mode = "internal";
 				};
 
 				port@3 {
 					reg = <3>;
 					label = "lan1";
+					phy-handle = <&sw_phy3>;
+					phy-mode = "internal";
 				};
 
 				port@5 {