diff mbox series

[v2,2/4] arm64: dts: mediatek: mt8195-demo: update and reorder reserved memory regions

Message ID 20230830111532.9048-2-macpaul.lin@mediatek.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/4] arm64: dts: mediatek: mt8195-demo: fix the memory size to 8GB | expand

Commit Message

Macpaul Lin Aug. 30, 2023, 11:15 a.m. UTC
The dts file of the MediaTek MT8195 demo board has been updated to include
new reserved memory regions.
These reserved memory regions are:
 - SCP
 - VPU,
 - Sound DMA
 - APU.

These regions are defined with the "shared-dma-pool" compatible property.
In addition, the existing reserved memory regions have been reordered by
their addresses to improve readability and maintainability of the DTS
file.

Cc: stable@vger.kernel.org      # 6.1, 6.4
Fixes: e4a417520101 ("arm64: dts: mediatek: mt8195-demo: fix the memory size of node secmon")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 38 ++++++++++++++++----
 1 file changed, 32 insertions(+), 6 deletions(-)

Changes for v2:
 - No change.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
index ff363ab925e9..8aea6f5d72b3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
@@ -56,12 +56,6 @@ 
 		#size-cells = <2>;
 		ranges;
 
-		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
-		bl31_secmon_reserved: secmon@54600000 {
-			no-map;
-			reg = <0 0x54600000 0x0 0x200000>;
-		};
-
 		/* 12 MiB reserved for OP-TEE (BL32)
 		 * +-----------------------+ 0x43e0_0000
 		 * |      SHMEM 2MiB       |
@@ -75,6 +69,38 @@ 
 			no-map;
 			reg = <0 0x43200000 0 0x00c00000>;
 		};
+
+		scp_mem: memory@50000000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0x50000000 0 0x2900000>;
+			no-map;
+		};
+
+		vpu_mem: memory@53000000 {
+			compatible = "shared-dma-pool";
+			size = <0 0x1400000>; /* 20 MB */
+			alignment = <0 0x10000>;
+			reg = <0 0x53000000 0 0x1400000>;
+		};
+
+		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
+		bl31_secmon_mem: memory@54600000 {
+			no-map;
+			reg = <0 0x54600000 0x0 0x200000>;
+		};
+
+		snd_dma_mem: memory@60000000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0x60000000 0 0x1100000>;
+			no-map;
+		};
+
+		apu_mem: memory@62000000 {
+			compatible = "shared-dma-pool";
+			size = <0 0x1400000>; /* 20 MB */
+			alignment = <0 0x10000>;
+			reg = <0 0x62000000 0 0x1400000>;
+		};
 	};
 };