From patchwork Wed Aug 30 11:15:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 13370188 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 388DEC6FA8F for ; Wed, 30 Aug 2023 11:17:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=foQuStZ54o9f7n5xmhCbYD0UyfZjGXSKRUBA2H+d20I=; b=u8EjrgGqeud89Z 7rSw5unFoaSH6ge5W9TTWHZutJRvFgH2SNHkM+jiLQw++26wosg4G4EevBPbKTvSsU7jvm+Pt+5HI VgsiCkPCHW1bYM/f92cqL+7WymfxXUhBOjiItR+7m81kVlU8Mzjw2uzz+j11YDcaGo7/WSsZeNgvc 9gSQ569iPA4KXO2T3QH9z0FzCZVnf9bOUnvHA5LUn3XKUzwEy/iEt8wfEhDnOuiBJSjgUJt4vUzXJ Uyovb6b9McIwDD71bxYeQm+4x8ypw8Ymugbk7kooLcnD9/kgvWhE/J5QraukYBh0Syd1s8+WAWC81 MlTX3+THoKZ1wyj5yoMg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qbJBa-00DN7G-0I; Wed, 30 Aug 2023 11:16:34 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qbJBR-00DN43-1e; Wed, 30 Aug 2023 11:16:26 +0000 X-UUID: a39c1264472611ee83ed1395ce914268-20230830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=v0S2k/hBUnuQV7cp1XuI6rFZDG90LyG06RmcSzH+9GM=; b=onUeuCqvQxBgp357i919yCKkd14rYsJrqxHMXjp4N5ZIF/MHADwVOLoXpe+nky5iRxL/j0PSPCjqVr5DLJMpszXYCAnffbcl7xqmkjrC6jh9keK24qCJAVeBTn90nOWcRkkAwLOPrDAKGYq/zcYvzIucaF3PK6nYGrlvV1/c/nU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31,REQID:d0361167-a132-488e-87c6-2389d28dd5eb,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:0ad78a4,CLOUDID:0b6d1eef-9a6e-4c39-b73e-f2bc08ca3dc5,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: a39c1264472611ee83ed1395ce914268-20230830 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 208214775; Wed, 30 Aug 2023 04:16:17 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 30 Aug 2023 19:15:42 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 30 Aug 2023 19:15:42 +0800 From: Macpaul Lin To: Alexandre Mergnat , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Fabien Parent , Macpaul Lin , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin , Chunfeng Yun , Subject: [PATCH v2 2/4] arm64: dts: mediatek: mt8195-demo: update and reorder reserved memory regions Date: Wed, 30 Aug 2023 19:15:30 +0800 Message-ID: <20230830111532.9048-2-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230830111532.9048-1-macpaul.lin@mediatek.com> References: <20230825114623.16884-1-macpaul.lin@mediatek.com> <20230830111532.9048-1-macpaul.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230830_041625_560380_0E98E071 X-CRM114-Status: GOOD ( 13.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The dts file of the MediaTek MT8195 demo board has been updated to include new reserved memory regions. These reserved memory regions are: - SCP - VPU, - Sound DMA - APU. These regions are defined with the "shared-dma-pool" compatible property. In addition, the existing reserved memory regions have been reordered by their addresses to improve readability and maintainability of the DTS file. Cc: stable@vger.kernel.org # 6.1, 6.4 Fixes: e4a417520101 ("arm64: dts: mediatek: mt8195-demo: fix the memory size of node secmon") Signed-off-by: Macpaul Lin --- arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 38 ++++++++++++++++---- 1 file changed, 32 insertions(+), 6 deletions(-) Changes for v2: - No change. diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts index ff363ab925e9..8aea6f5d72b3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts @@ -56,12 +56,6 @@ #size-cells = <2>; ranges; - /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ - bl31_secmon_reserved: secmon@54600000 { - no-map; - reg = <0 0x54600000 0x0 0x200000>; - }; - /* 12 MiB reserved for OP-TEE (BL32) * +-----------------------+ 0x43e0_0000 * | SHMEM 2MiB | @@ -75,6 +69,38 @@ no-map; reg = <0 0x43200000 0 0x00c00000>; }; + + scp_mem: memory@50000000 { + compatible = "shared-dma-pool"; + reg = <0 0x50000000 0 0x2900000>; + no-map; + }; + + vpu_mem: memory@53000000 { + compatible = "shared-dma-pool"; + size = <0 0x1400000>; /* 20 MB */ + alignment = <0 0x10000>; + reg = <0 0x53000000 0 0x1400000>; + }; + + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_mem: memory@54600000 { + no-map; + reg = <0 0x54600000 0x0 0x200000>; + }; + + snd_dma_mem: memory@60000000 { + compatible = "shared-dma-pool"; + reg = <0 0x60000000 0 0x1100000>; + no-map; + }; + + apu_mem: memory@62000000 { + compatible = "shared-dma-pool"; + size = <0 0x1400000>; /* 20 MB */ + alignment = <0 0x10000>; + reg = <0 0x62000000 0 0x1400000>; + }; }; };