| Message ID | 20230912101018.225246-1-herve.codina@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for QMC HDLC, framer infrastructure and PEF2256 framer | expand |
On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > The QMC (QUICC mutichannel controller) is a controller present in some > PowerQUICC SoC such as MPC885. > The QMC HDLC uses the QMC controller to transfer HDLC data. > > Additionally, a framer can be connected to the QMC HDLC. > If present, this framer is the interface between the TDM bus used by the > QMC HDLC and the E1/T1 line. > The QMC HDLC can use this framer to get information about the E1/T1 line > and configure the E1/T1 line. > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > --- > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > index 82d9beb48e00..b5073531f3f1 100644 > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > @@ -101,6 +101,16 @@ patternProperties: > Channel assigned Rx time-slots within the Rx time-slots routed by the > TSA to this cell. > > + compatible: > + const: fsl,qmc-hdlc > + > + fsl,framer: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + phandle to the framer node. The framer is in charge of an E1/T1 line > + interface connected to the TDM bus. It can be used to get the E1/T1 line > + status such as link up/down. Sounds like this fsl,framer property should depend on the compatible being present, no? Thanks, Conor. > + > required: > - reg > - fsl,tx-ts-mask > @@ -159,5 +169,8 @@ examples: > fsl,operational-mode = "hdlc"; > fsl,tx-ts-mask = <0x00000000 0x0000ff00>; > fsl,rx-ts-mask = <0x00000000 0x0000ff00>; > + > + compatible = "fsl,qmc-hdlc"; > + fsl,framer = <&framer>; > }; > }; > -- > 2.41.0 >
Hi Conor, On Tue, 12 Sep 2023 18:21:58 +0100 Conor Dooley <conor@kernel.org> wrote: > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > > The QMC (QUICC mutichannel controller) is a controller present in some > > PowerQUICC SoC such as MPC885. > > The QMC HDLC uses the QMC controller to transfer HDLC data. > > > > Additionally, a framer can be connected to the QMC HDLC. > > If present, this framer is the interface between the TDM bus used by the > > QMC HDLC and the E1/T1 line. > > The QMC HDLC can use this framer to get information about the E1/T1 line > > and configure the E1/T1 line. > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > --- > > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > index 82d9beb48e00..b5073531f3f1 100644 > > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > @@ -101,6 +101,16 @@ patternProperties: > > Channel assigned Rx time-slots within the Rx time-slots routed by the > > TSA to this cell. > > > > + compatible: > > + const: fsl,qmc-hdlc > > + > > + fsl,framer: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > + phandle to the framer node. The framer is in charge of an E1/T1 line > > + interface connected to the TDM bus. It can be used to get the E1/T1 line > > + status such as link up/down. > > Sounds like this fsl,framer property should depend on the compatible > being present, no? Well from the implementation point of view, only the QMC HDLC driver uses this property. From the hardware description point of view, this property means that the time slots handled by this channel are connected to the framer. So I think it makes sense for any channel no matter the compatible (even if compatible is not present). Should I change and constraint the fsl,framer property to the compatible presence ? If so, is the following correct for this contraint ? --- 8< --- dependencies: - fsl,framer: [ compatible ]; --- 8< --- Regards, Hervé > > Thanks, > Conor. > > > + > > required: > > - reg > > - fsl,tx-ts-mask > > @@ -159,5 +169,8 @@ examples: > > fsl,operational-mode = "hdlc"; > > fsl,tx-ts-mask = <0x00000000 0x0000ff00>; > > fsl,rx-ts-mask = <0x00000000 0x0000ff00>; > > + > > + compatible = "fsl,qmc-hdlc"; > > + fsl,framer = <&framer>; > > }; > > }; > > -- > > 2.41.0 > >
On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote: > Hi Conor, > > On Tue, 12 Sep 2023 18:21:58 +0100 > Conor Dooley <conor@kernel.org> wrote: > > > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > > > The QMC (QUICC mutichannel controller) is a controller present in some > > > PowerQUICC SoC such as MPC885. > > > The QMC HDLC uses the QMC controller to transfer HDLC data. > > > > > > Additionally, a framer can be connected to the QMC HDLC. > > > If present, this framer is the interface between the TDM bus used by the > > > QMC HDLC and the E1/T1 line. > > > The QMC HDLC can use this framer to get information about the E1/T1 line > > > and configure the E1/T1 line. > > > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > > --- > > > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > > > 1 file changed, 13 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > index 82d9beb48e00..b5073531f3f1 100644 > > > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > @@ -101,6 +101,16 @@ patternProperties: > > > Channel assigned Rx time-slots within the Rx time-slots routed by the > > > TSA to this cell. > > > > > > + compatible: > > > + const: fsl,qmc-hdlc > > > + > > > + fsl,framer: > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > + description: > > > + phandle to the framer node. The framer is in charge of an E1/T1 line > > > + interface connected to the TDM bus. It can be used to get the E1/T1 line > > > + status such as link up/down. > > > > Sounds like this fsl,framer property should depend on the compatible > > being present, no? > > Well from the implementation point of view, only the QMC HDLC driver uses this > property. > > From the hardware description point of view, this property means that the time slots > handled by this channel are connected to the framer. So I think it makes sense for > any channel no matter the compatible (even if compatible is not present). > > Should I change and constraint the fsl,framer property to the compatible presence ? > If so, is the following correct for this contraint ? > --- 8< --- > dependencies: > - fsl,framer: [ compatible ]; > --- 8< --- The regular sort of if: compatible: contains: const: foo then: required: - fsl,framer would fit the bill, no?
On Wed, 13 Sep 2023 15:42:45 +0100 Conor Dooley <conor@kernel.org> wrote: > On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote: > > Hi Conor, > > > > On Tue, 12 Sep 2023 18:21:58 +0100 > > Conor Dooley <conor@kernel.org> wrote: > > > > > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > > > > The QMC (QUICC mutichannel controller) is a controller present in some > > > > PowerQUICC SoC such as MPC885. > > > > The QMC HDLC uses the QMC controller to transfer HDLC data. > > > > > > > > Additionally, a framer can be connected to the QMC HDLC. > > > > If present, this framer is the interface between the TDM bus used by the > > > > QMC HDLC and the E1/T1 line. > > > > The QMC HDLC can use this framer to get information about the E1/T1 line > > > > and configure the E1/T1 line. > > > > > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > > > --- > > > > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > > > > 1 file changed, 13 insertions(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > index 82d9beb48e00..b5073531f3f1 100644 > > > > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > @@ -101,6 +101,16 @@ patternProperties: > > > > Channel assigned Rx time-slots within the Rx time-slots routed by the > > > > TSA to this cell. > > > > > > > > + compatible: > > > > + const: fsl,qmc-hdlc > > > > + > > > > + fsl,framer: > > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > > + description: > > > > + phandle to the framer node. The framer is in charge of an E1/T1 line > > > > + interface connected to the TDM bus. It can be used to get the E1/T1 line > > > > + status such as link up/down. > > > > > > Sounds like this fsl,framer property should depend on the compatible > > > being present, no? > > > > Well from the implementation point of view, only the QMC HDLC driver uses this > > property. > > > > From the hardware description point of view, this property means that the time slots > > handled by this channel are connected to the framer. So I think it makes sense for > > any channel no matter the compatible (even if compatible is not present). > > > > Should I change and constraint the fsl,framer property to the compatible presence ? > > If so, is the following correct for this contraint ? > > --- 8< --- > > dependencies: > > - fsl,framer: [ compatible ]; > > --- 8< --- > > The regular sort of > if: > compatible: > contains: > const: foo > then: > required: > - fsl,framer > would fit the bill, no? Not sure. "fsl,framer" is an optional property (depending on the hardware we can have a framer or not). Hervé
On Wed, Sep 13, 2023 at 04:52:50PM +0200, Herve Codina wrote: > On Wed, 13 Sep 2023 15:42:45 +0100 > Conor Dooley <conor@kernel.org> wrote: > > > On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote: > > > Hi Conor, > > > > > > On Tue, 12 Sep 2023 18:21:58 +0100 > > > Conor Dooley <conor@kernel.org> wrote: > > > > > > > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > > > > > The QMC (QUICC mutichannel controller) is a controller present in some > > > > > PowerQUICC SoC such as MPC885. > > > > > The QMC HDLC uses the QMC controller to transfer HDLC data. > > > > > > > > > > Additionally, a framer can be connected to the QMC HDLC. > > > > > If present, this framer is the interface between the TDM bus used by the > > > > > QMC HDLC and the E1/T1 line. > > > > > The QMC HDLC can use this framer to get information about the E1/T1 line > > > > > and configure the E1/T1 line. > > > > > > > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > > > > --- > > > > > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > > > > > 1 file changed, 13 insertions(+) > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > index 82d9beb48e00..b5073531f3f1 100644 > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > @@ -101,6 +101,16 @@ patternProperties: > > > > > Channel assigned Rx time-slots within the Rx time-slots routed by the > > > > > TSA to this cell. > > > > > > > > > > + compatible: > > > > > + const: fsl,qmc-hdlc > > > > > + > > > > > + fsl,framer: > > > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > > > + description: > > > > > + phandle to the framer node. The framer is in charge of an E1/T1 line > > > > > + interface connected to the TDM bus. It can be used to get the E1/T1 line > > > > > + status such as link up/down. > > > > > > > > Sounds like this fsl,framer property should depend on the compatible > > > > being present, no? > > > > > > Well from the implementation point of view, only the QMC HDLC driver uses this > > > property. > > > > > > From the hardware description point of view, this property means that the time slots > > > handled by this channel are connected to the framer. So I think it makes sense for > > > any channel no matter the compatible (even if compatible is not present). > > > > > > Should I change and constraint the fsl,framer property to the compatible presence ? > > > If so, is the following correct for this contraint ? > > > --- 8< --- > > > dependencies: > > > - fsl,framer: [ compatible ]; > > > --- 8< --- > > > > The regular sort of > > if: > > compatible: > > contains: > > const: foo > > then: > > required: > > - fsl,framer > > would fit the bill, no? > > Not sure. > "fsl,framer" is an optional property (depending on the hardware we can have > a framer or not). Ah apologies, I had it backwards! Your suggestion seems fair in that case. Thanks, Conor.
On Wed, Sep 13, 2023 at 03:56:16PM +0100, Conor Dooley wrote: > On Wed, Sep 13, 2023 at 04:52:50PM +0200, Herve Codina wrote: > > On Wed, 13 Sep 2023 15:42:45 +0100 > > Conor Dooley <conor@kernel.org> wrote: > > > > > On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote: > > > > Hi Conor, > > > > > > > > On Tue, 12 Sep 2023 18:21:58 +0100 > > > > Conor Dooley <conor@kernel.org> wrote: > > > > > > > > > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > > > > > > The QMC (QUICC mutichannel controller) is a controller present in some > > > > > > PowerQUICC SoC such as MPC885. > > > > > > The QMC HDLC uses the QMC controller to transfer HDLC data. > > > > > > > > > > > > Additionally, a framer can be connected to the QMC HDLC. > > > > > > If present, this framer is the interface between the TDM bus used by the > > > > > > QMC HDLC and the E1/T1 line. > > > > > > The QMC HDLC can use this framer to get information about the E1/T1 line > > > > > > and configure the E1/T1 line. > > > > > > > > > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > > > > > --- > > > > > > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > > > > > > 1 file changed, 13 insertions(+) > > > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > > index 82d9beb48e00..b5073531f3f1 100644 > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > > @@ -101,6 +101,16 @@ patternProperties: > > > > > > Channel assigned Rx time-slots within the Rx time-slots routed by the > > > > > > TSA to this cell. > > > > > > > > > > > > + compatible: > > > > > > + const: fsl,qmc-hdlc > > > > > > + > > > > > > + fsl,framer: > > > > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > > > > + description: > > > > > > + phandle to the framer node. The framer is in charge of an E1/T1 line > > > > > > + interface connected to the TDM bus. It can be used to get the E1/T1 line > > > > > > + status such as link up/down. > > > > > > > > > > Sounds like this fsl,framer property should depend on the compatible > > > > > being present, no? > > > > > > > > Well from the implementation point of view, only the QMC HDLC driver uses this > > > > property. > > > > > > > > From the hardware description point of view, this property means that the time slots > > > > handled by this channel are connected to the framer. So I think it makes sense for > > > > any channel no matter the compatible (even if compatible is not present). > > > > > > > > Should I change and constraint the fsl,framer property to the compatible presence ? > > > > If so, is the following correct for this contraint ? > > > > --- 8< --- > > > > dependencies: > > > > - fsl,framer: [ compatible ]; > > > > --- 8< --- > > > > > > The regular sort of > > > if: > > > compatible: > > > contains: > > > const: foo > > > then: > > > required: > > > - fsl,framer > > > would fit the bill, no? > > > > Not sure. > > "fsl,framer" is an optional property (depending on the hardware we can have > > a framer or not). > > Ah apologies, I had it backwards! Your suggestion seems fair in that > case. Or actually, if: compatible: not: contains: const: foo then: properties: fsl,framer: false ? That should do the trick in a more conventional way.
Hi Conor, On Wed, 13 Sep 2023 15:59:41 +0100 Conor Dooley <conor@kernel.org> wrote: > On Wed, Sep 13, 2023 at 03:56:16PM +0100, Conor Dooley wrote: > > On Wed, Sep 13, 2023 at 04:52:50PM +0200, Herve Codina wrote: > > > On Wed, 13 Sep 2023 15:42:45 +0100 > > > Conor Dooley <conor@kernel.org> wrote: > > > > > > > On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote: > > > > > Hi Conor, > > > > > > > > > > On Tue, 12 Sep 2023 18:21:58 +0100 > > > > > Conor Dooley <conor@kernel.org> wrote: > > > > > > > > > > > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote: > > > > > > > The QMC (QUICC mutichannel controller) is a controller present in some > > > > > > > PowerQUICC SoC such as MPC885. > > > > > > > The QMC HDLC uses the QMC controller to transfer HDLC data. > > > > > > > > > > > > > > Additionally, a framer can be connected to the QMC HDLC. > > > > > > > If present, this framer is the interface between the TDM bus used by the > > > > > > > QMC HDLC and the E1/T1 line. > > > > > > > The QMC HDLC can use this framer to get information about the E1/T1 line > > > > > > > and configure the E1/T1 line. > > > > > > > > > > > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > > > > > > --- > > > > > > > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ > > > > > > > 1 file changed, 13 insertions(+) > > > > > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > > > index 82d9beb48e00..b5073531f3f1 100644 > > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml > > > > > > > @@ -101,6 +101,16 @@ patternProperties: > > > > > > > Channel assigned Rx time-slots within the Rx time-slots routed by the > > > > > > > TSA to this cell. > > > > > > > > > > > > > > + compatible: > > > > > > > + const: fsl,qmc-hdlc > > > > > > > + > > > > > > > + fsl,framer: > > > > > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > > > > > + description: > > > > > > > + phandle to the framer node. The framer is in charge of an E1/T1 line > > > > > > > + interface connected to the TDM bus. It can be used to get the E1/T1 line > > > > > > > + status such as link up/down. > > > > > > > > > > > > Sounds like this fsl,framer property should depend on the compatible > > > > > > being present, no? > > > > > > > > > > Well from the implementation point of view, only the QMC HDLC driver uses this > > > > > property. > > > > > > > > > > From the hardware description point of view, this property means that the time slots > > > > > handled by this channel are connected to the framer. So I think it makes sense for > > > > > any channel no matter the compatible (even if compatible is not present). > > > > > > > > > > Should I change and constraint the fsl,framer property to the compatible presence ? > > > > > If so, is the following correct for this contraint ? > > > > > --- 8< --- > > > > > dependencies: > > > > > - fsl,framer: [ compatible ]; > > > > > --- 8< --- > > > > > > > > The regular sort of > > > > if: > > > > compatible: > > > > contains: > > > > const: foo > > > > then: > > > > required: > > > > - fsl,framer > > > > would fit the bill, no? > > > > > > Not sure. > > > "fsl,framer" is an optional property (depending on the hardware we can have > > > a framer or not). > > > > Ah apologies, I had it backwards! Your suggestion seems fair in that > > case. > > Or actually, > if: > compatible: > not: > contains: > const: foo > then: > properties: > fsl,framer: false > ? That should do the trick in a more conventional way. Thanks for this proposal. I will use it in the next iteration. Regards, Hervé
diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml index 82d9beb48e00..b5073531f3f1 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml @@ -101,6 +101,16 @@ patternProperties: Channel assigned Rx time-slots within the Rx time-slots routed by the TSA to this cell. + compatible: + const: fsl,qmc-hdlc + + fsl,framer: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the framer node. The framer is in charge of an E1/T1 line + interface connected to the TDM bus. It can be used to get the E1/T1 line + status such as link up/down. + required: - reg - fsl,tx-ts-mask @@ -159,5 +169,8 @@ examples: fsl,operational-mode = "hdlc"; fsl,tx-ts-mask = <0x00000000 0x0000ff00>; fsl,rx-ts-mask = <0x00000000 0x0000ff00>; + + compatible = "fsl,qmc-hdlc"; + fsl,framer = <&framer>; }; };
The QMC (QUICC mutichannel controller) is a controller present in some PowerQUICC SoC such as MPC885. The QMC HDLC uses the QMC controller to transfer HDLC data. Additionally, a framer can be connected to the QMC HDLC. If present, this framer is the interface between the TDM bus used by the QMC HDLC and the E1/T1 line. The QMC HDLC can use this framer to get information about the E1/T1 line and configure the E1/T1 line. Signed-off-by: Herve Codina <herve.codina@bootlin.com> --- .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+)