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Sun, 17 Sep 2023 15:40:39 -0700 (PDT) Received: from [127.0.1.1] ([91.230.2.244]) by smtp.gmail.com with ESMTPSA id x14-20020a1c7c0e000000b003fe2b081661sm13642931wmc.30.2023.09.17.15.40.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Sep 2023 15:40:38 -0700 (PDT) From: Benjamin Bara Date: Mon, 18 Sep 2023 00:40:05 +0200 Subject: [PATCH 09/13] clk: imx: pll14xx: consider active rate for re-config MIME-Version: 1.0 Message-Id: <20230918-imx8mp-dtsi-v1-9-1d008b3237c0@skidata.com> References: <20230918-imx8mp-dtsi-v1-0-1d008b3237c0@skidata.com> In-Reply-To: <20230918-imx8mp-dtsi-v1-0-1d008b3237c0@skidata.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Michael Turquette , Stephen Boyd , Russell King , Abel Vesa , Peng Fan Cc: Frank Oltmanns , Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Benjamin Bara X-Mailer: b4 0.12.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230917_154041_486557_7D2B3507 X-CRM114-Status: GOOD ( 16.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Benjamin Bara As the pll14xx might be the parent of multiple child clocks, the active config is most likely still required by one of them. As the children have divider, use the LCM of the old and the new rate to target for an integer multiple of the active rate. Signed-off-by: Benjamin Bara --- drivers/clk/imx/clk-pll14xx.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 0d58d85c375e..803e8b0a7a31 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -36,6 +37,7 @@ struct clk_pll14xx { struct clk_hw hw; + unsigned long rate; void __iomem *base; enum imx_pll14xx_type type; const struct imx_pll14xx_rate_table *rate_table; @@ -235,6 +237,22 @@ static long clk_pll1443x_round_rate(struct clk_hw *hw, unsigned long rate, struct clk_pll14xx *pll = to_clk_pll14xx(hw); struct imx_pll14xx_rate_table t; + /* + * If the PLL is configured more than once, we have to consider the + * active config for the new rate. As the children have divider, also + * allow multiples of the already configured rate. This is a simple + * approach to enable dynamic re-config via SET_CLK_RATE_PARENT for more + * than one consumer. E.g. on the imx8mp, when video_pll1 is parent of + * media_ldb and media_disp2_pix (always 7:1). + */ + if (pll->rate) { + unsigned long want = rate; + + rate = lcm(pll->rate, rate); + pr_debug("%s: old=%ld, want=%ld, new=%ld\n", clk_hw_get_name(hw), + pll->rate, want, rate); + } + imx_pll14xx_calc_settings(pll, rate, *prate, &t); return t.rate; @@ -343,6 +361,8 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate, tmp &= ~BYPASS_MASK; writel_relaxed(tmp, pll->base + GNRL_CTL); + pll->rate = rate->rate; + return 0; }