diff mbox series

[5/5] arm64: dts: imx8dxl-ss-ddr: change ddr_pmu0 compatilbe

Message ID 20230920102004.886599-5-xu.yang_2@nxp.com (mailing list archive)
State New, archived
Headers show
Series [1/5] perf: fsl_imx8_ddr: Add AXI ID PORT CHANNEL filter support | expand

Commit Message

Xu Yang Sept. 20, 2023, 10:20 a.m. UTC 
i.MX8DXL's ddr pmu has port/channel filter capabilities, but it still is
compatilbe with "fsl,imx8-ddr-pmu". This will change the compatilbe.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Krzysztof Kozlowski Sept. 20, 2023, 1:23 p.m. UTC | #1 
On 20/09/2023 12:20, Xu Yang wrote:
> i.MX8DXL's ddr pmu has port/channel filter capabilities, but it still is
> compatilbe with "fsl,imx8-ddr-pmu". This will change the compatilbe.

Typos: compatible


Best regards,
Krzysztof
Xu Yang Sept. 21, 2023, 1:35 a.m. UTC | #2 
Hi Krzysztof,

> On 20/09/2023 12:20, Xu Yang wrote:
> > i.MX8DXL's ddr pmu has port/channel filter capabilities, but it still is
> > compatilbe with "fsl,imx8-ddr-pmu". This will change the compatilbe.
> 
> Typos: compatible

Will fix it.

Thanks,
Xu Yang

> 
> 
> Best regards,
> Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
index 550f513708d8..3569abb5bb9b 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
@@ -4,6 +4,6 @@ 
  */
 
 &ddr_pmu0 {
-	compatible = "fsl,imx8-ddr-pmu";
+	compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";
 	interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 };