From patchwork Wed Sep 20 19:26:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13393333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A05A3C04FF1 for ; Wed, 20 Sep 2023 19:29:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oQIqr9TzKMsEUHLw3XpUDGFsD0WnmR95H5+tB4OSdnI=; b=I3189xUOQfA1fa 2YueCjNkJgCXLulWgtMkkGQQZ/6cW2IFLktF3+veapAHroxSMPEu8uL8YlAfLHZBt2cvuuUG9Eeyd 6qLFbmdgm0l5kZjYjtr4DReju0gbEaTTPJek3sEZ7qw8ZC/40zrbA19QkELO64geka3/XlxgSYmIa w75iLm4dJcIvfs1PRSpr1YA8DlPyBWwmid29pTYA0kEJPEAjcYyUBxNs4swJxh1w57eF2Jxjgm2Ef d3HAih0FvA5lptnQGwfc51jUEy+CwA37tx6VqzUiMJMGuCAx4MayGEIrmphzk9/hYhUedBU6oT3ML PMdij2N/QQNqNa4W9d1A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qj2sW-0040Jl-0C; Wed, 20 Sep 2023 19:28:52 +0000 Received: from mail-lf1-x131.google.com ([2a00:1450:4864:20::131]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qj2sP-0040Eq-0q for linux-arm-kernel@lists.infradead.org; Wed, 20 Sep 2023 19:28:46 +0000 Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-50300cb4776so366241e87.3 for ; Wed, 20 Sep 2023 12:28:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1695238123; x=1695842923; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9BUlFc32U67LJr2U7BzHv473MxaTEfZQ+YLInYVLVj8=; b=YTXAIz7WdzwOWyux6yTXU93iRVMv69aWmApxC6DmIziW6ehzOGEugjI7dTxaZ7Xozz 5WIfW5Ef08/vQXlqHk1La3QSgzNR4YcncqG/wmF1DJ3fTEmt2ptBUhYlvabuG2rwXJng xNwULMIznesRPtyjHk+NIxgO8IRHJNrQDLHkEg7RKI/b7MnuwuBuvuGVixR+XRaylnYA 9H/8aiSfzJxySES9eL8EzmimiT4cIS9xb2VrDXxDXIBEPuEmoSbrGfrA0EOl0gjnHVu9 ELF+V/O5Dl6JZuETcQtn+xUKp9d0omMTu8K73qytTPTiExCbJSOULh9DYvAFKTHCDaxt ws9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695238123; x=1695842923; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9BUlFc32U67LJr2U7BzHv473MxaTEfZQ+YLInYVLVj8=; b=X1JbPdsXlUUT07nRmVbw56zzwECgKGqOyI4Wy6KNXaPWW8z6LpvRrpjj7SURY9v1iB JfFCthtIhF9GLFRY5HyaAjaJSCsEqiCv9g2Uc/lh63ZxMYDqbRHtwABxVchgHVTp4MwI fhay2vwZfkBdsIRpOeKwO3GU1rb3DeUwS2k303Xud5cbo67BKPK/uGkNKE01EMcAZUFF DE3R9ungcpfe4TeoET7JS4yOMABSZpmQ7779G/a+/FirlJz6ULZsSPcM+eMgFNYzcQW+ TIyIriX8tJ6cV3fUQ+TvbM1D3NGYhyUaPnapa/iR9Dg8tjohyDI0i2aEyytgAHVLS5lX xBaw== X-Gm-Message-State: AOJu0YxxhRe/rSrlv+bKGarBECB+ET+f2xVK8OxWoGPkEDRskiZ7Hsbk HGf2/pynX7cNFR0bloZiE3k= X-Google-Smtp-Source: AGHT+IFYNvADX+pg8J040J7aG80SLXnN5ERc9qA5f7ctLC5xfL2gP5i7P26Ct9T5OB35Yi6y+G1VvQ== X-Received: by 2002:a19:384b:0:b0:4fd:c715:5667 with SMTP id d11-20020a19384b000000b004fdc7155667mr2480908lfj.20.1695238123500; Wed, 20 Sep 2023 12:28:43 -0700 (PDT) Received: from localhost ([178.176.82.53]) by smtp.gmail.com with ESMTPSA id d5-20020ac241c5000000b004fe28e3841bsm2793757lfi.267.2023.09.20.12.28.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 12:28:42 -0700 (PDT) From: Serge Semin To: Michal Simek , Alexander Stein , Borislav Petkov , Tony Luck , James Morse , Mauro Carvalho Chehab , Robert Richter Cc: Serge Semin , Punnaiah Choudary Kalluri , Dinh Nguyen , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 07/18] EDAC/synopsys: Parse ADDRMAP[7-8] CSRs for (LP)DDR4 only Date: Wed, 20 Sep 2023 22:26:52 +0300 Message-ID: <20230920192806.29960-8-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230920192806.29960-1-fancer.lancer@gmail.com> References: <20230920192806.29960-1-fancer.lancer@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230920_122845_329731_F3826A5D X-CRM114-Status: GOOD ( 14.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These CSRs contain the SDRAM Bank Groups and row[16]/row[17] bits mapping, which are applicable for the DDR4 and LPDDR4 memory chips only. For the rest of the memories the ADDRMAP[7-8] registers are unused by the controller and are zeros by default. The zero values will be perceived by the HIF/SDRAM mapping detection procedure as normal bit positions, which is wrong. So in order to prevent that parse these registers only if they are applicable for the detected DDR protocol. Signed-off-by: Serge Semin --- drivers/edac/synopsys_edac.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index b77bc84c0bb0..5a06038aedcb 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -1008,12 +1008,15 @@ static void snps_setup_row_address_map(struct snps_edac_priv *priv, u32 *addrmap priv->row_shift[15] = (((addrmap[6] >> 24) & ROW_MAX_VAL_MASK) == ROW_MAX_VAL_MASK) ? 0 : (((addrmap[6] >> 24) & ROW_MAX_VAL_MASK) + ROW_B15_BASE); - priv->row_shift[16] = ((addrmap[7] & ROW_MAX_VAL_MASK) == - ROW_MAX_VAL_MASK) ? 0 : ((addrmap[7] & - ROW_MAX_VAL_MASK) + ROW_B16_BASE); - priv->row_shift[17] = (((addrmap[7] >> 8) & ROW_MAX_VAL_MASK) == - ROW_MAX_VAL_MASK) ? 0 : (((addrmap[7] >> 8) & - ROW_MAX_VAL_MASK) + ROW_B17_BASE); + + if (priv->info.sdram_mode == MEM_DDR4 || priv->info.sdram_mode == MEM_LPDDR4) { + priv->row_shift[16] = ((addrmap[7] & ROW_MAX_VAL_MASK) == + ROW_MAX_VAL_MASK) ? 0 : ((addrmap[7] & + ROW_MAX_VAL_MASK) + ROW_B16_BASE); + priv->row_shift[17] = (((addrmap[7] >> 8) & ROW_MAX_VAL_MASK) == + ROW_MAX_VAL_MASK) ? 0 : (((addrmap[7] >> 8) & + ROW_MAX_VAL_MASK) + ROW_B17_BASE); + } } static void snps_setup_column_address_map(struct snps_edac_priv *priv, u32 *addrmap) @@ -1129,6 +1132,10 @@ static void snps_setup_bank_address_map(struct snps_edac_priv *priv, u32 *addrma static void snps_setup_bg_address_map(struct snps_edac_priv *priv, u32 *addrmap) { + /* Bank group signals are available on the DDR4 memory only */ + if (priv->info.sdram_mode != MEM_DDR4) + return; + priv->bankgrp_shift[0] = (addrmap[8] & BANKGRP_MAX_VAL_MASK) + BANKGRP_B0_BASE; priv->bankgrp_shift[1] = (((addrmap[8] >> 8) & BANKGRP_MAX_VAL_MASK) ==