From patchwork Tue Sep 26 23:40:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raghavendra Rao Ananta X-Patchwork-Id: 13399717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F9FFE7F144 for ; Tue, 26 Sep 2023 23:41:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Y5t97JQ5IAuscfT0uKbhJtBI2SGaMWTCnFlAEoPJAoY=; b=ivp+lRViL4/RCtiKX80yTOkjgc MOnMeNlO+Doc1om24uVTbGOXavETT5vdxcC6/IJWEm8V++js5Dc9dXF2tsMYM79p4xiFiRmhNBf98 lGQpmoSTONWDuxEGTAI5Of1dbEveAmbrctynWrcw49JAZhFjgctGbliBp78XmrFCx6q/FaXSrmtdd jLccPALEkaEd+3JwBUjQ7J3hbrjQ2g5C2bSj+ga7KhuGm1eaGwtqYkvlvUsYRTNcf6g7i6d9zrGE6 A9CCnE5Lh3tDGEUKvpdfh1kngd1CC5PfwlDfU5WjnfTFdjww0Ck5LZ7Du+YM6hkJasE+2kMpedSAi 2xwNAA1A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qlHfO-00HBiq-1V; Tue, 26 Sep 2023 23:40:34 +0000 Received: from mail-yb1-xb4a.google.com ([2607:f8b0:4864:20::b4a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qlHf7-00HBcW-0a for linux-arm-kernel@lists.infradead.org; Tue, 26 Sep 2023 23:40:19 +0000 Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-d81646fcf3eso15441358276.0 for ; Tue, 26 Sep 2023 16:40:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1695771615; x=1696376415; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=jKu1b4ypf/1yghTsriWdPSnBvGzU0xcIPJuBHtiUctI=; b=raIYWgxjL+5YCjgnMoLW4iIHHBXxscYdgZ+nkk0VwA0Lf5qA/XNIucCY99DwUr7DRv Dgnwn6QUXhMHlIAi5blFEVDfIwwrOyAP4DtYpmHgPfK6c4Dd/1bsTAsBGKhAfHkkPSE6 +AwTUvTDOF5BxUlSOGof7xdjI3J3m2aQ+PcPafla01+PZI2I6RMmYNMo7k8Zaxfe0Ldq xlWfqIZTL8ApuPrlxA2TkZAuA61n0xH/I1quzRkcnVjSWTaVbNC1JIXbAZy+YTYPP2oH euJWk5/BmQKg0g7tikCXQ04BND5q7J+hYpkl8UKb51W6zW5C3ufziRLhozJ5uIPxq8Uv 4b1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695771615; x=1696376415; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=jKu1b4ypf/1yghTsriWdPSnBvGzU0xcIPJuBHtiUctI=; b=n7E+YxAFAK/5uX8TLyMeWkHAUoNeiPuWVAY+8rb0mH+3o+VW0D4AQn+QSdgVs3Fbi4 mHg61M6iFSAOj5lVGxOdChvf0Vc8h9YN/SW5yGHjG90lJWMfesj4IeMBW4adEIWfSlRj xflW9k8u6d26un2+dsjlMbtPxnly/mGKrS08r1eOrAd7sA9WF9Yk9ywTLCbtYzZT6wpV VcrKbBrI7BMz/00HTy+nhIbzi5hWzGdkNO+98IOCdidjUvCkK8f0qKxM9v2Wk3kHQ+vX XgppxS52W48AT0XWQAWnXxuCw+51f0LPA+/j9o4azQ3zpP25+idSWxWnPCLyetDHbqgb HR7g== X-Gm-Message-State: AOJu0YyHz/V/b4VP5mSsG1KlVKLmfewzPB/3YrYH9tWuzRHUOwX9Xp5w fzdenZFsGZRGRE7+gOg3VdAjxsTs5p8b X-Google-Smtp-Source: AGHT+IGV5SFhSIRyByL8fTSP12VqgZmgARh5Ry8ZzINOdYh4tv/44IYbvZ41cAWOSTLUQkOt8P/xRpn4mw7O X-Received: from rananta-linux.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:20a1]) (user=rananta job=sendgmr) by 2002:a25:ad13:0:b0:d77:984e:c770 with SMTP id y19-20020a25ad13000000b00d77984ec770mr4746ybi.5.1695771615699; Tue, 26 Sep 2023 16:40:15 -0700 (PDT) Date: Tue, 26 Sep 2023 23:40:01 +0000 In-Reply-To: <20230926234008.2348607-1-rananta@google.com> Mime-Version: 1.0 References: <20230926234008.2348607-1-rananta@google.com> X-Mailer: git-send-email 2.42.0.582.g8ccd20d70d-goog Message-ID: <20230926234008.2348607-5-rananta@google.com> Subject: [PATCH v6 04/11] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 From: Raghavendra Rao Ananta To: Oliver Upton , Marc Zyngier Cc: Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , Raghavendra Rao Anata , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230926_164017_216196_92BE19BA X-CRM114-Status: GOOD ( 12.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Reiji Watanabe The default reset function for PMU registers (defined by PMU_SYS_REG) now simply clears a specified register. Use the default one for PMUSERENR_EL0 and PMCCFILTR_EL0, as KVM currently clears those registers on vCPU reset (NOTE: All non-RES0 fields of those registers have UNKNOWN reset values, and the same fields of their AArch32 registers have 0 reset values). No functional change intended. Signed-off-by: Reiji Watanabe Signed-off-by: Raghavendra Rao Ananta --- arch/arm64/kvm/sys_regs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index ffd123fae30d6..66b9e1de54230 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2180,7 +2180,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { * in 32bit mode. Here we choose to reset it as zero for consistency. */ { PMU_SYS_REG(PMUSERENR_EL0), .access = access_pmuserenr, - .reset = reset_val, .reg = PMUSERENR_EL0, .val = 0 }, + .reg = PMUSERENR_EL0, }, { PMU_SYS_REG(PMOVSSET_EL0), .access = access_pmovs, .reg = PMOVSSET_EL0 }, @@ -2338,7 +2338,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { * in 32bit mode. Here we choose to reset it as zero for consistency. */ { PMU_SYS_REG(PMCCFILTR_EL0), .access = access_pmu_evtyper, - .reset = reset_val, .reg = PMCCFILTR_EL0, .val = 0 }, + .reg = PMCCFILTR_EL0, }, EL2_REG(VPIDR_EL2, access_rw, reset_unknown, 0), EL2_REG(VMPIDR_EL2, access_rw, reset_unknown, 0),