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Fri, 06 Oct 2023 15:16:18 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:1f37:5459:32bf:faf9]) by smtp.gmail.com with ESMTPSA id rj6-20020a17090b3e8600b00276e8e4f1fbsm5946523pjb.1.2023.10.06.15.16.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Oct 2023 15:16:17 -0700 (PDT) From: Douglas Anderson To: Marc Zyngier , Mark Rutland , Catalin Marinas , Will Deacon , Chen-Yu Tsai Cc: Douglas Anderson , Amit Daniel Kachhap , AngeloGioacchino Del Regno , James Morse , Joey Gouly , Mark Brown , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/3] arm64: Disable GiC priorities on Mediatek devices w/ firmware issues Date: Fri, 6 Oct 2023 15:15:51 -0700 Message-ID: <20231006151547.1.Ide945748593cffd8ff0feb9ae22b795935b944d6@changeid> X-Mailer: git-send-email 2.42.0.609.gbb76f46606-goog MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231006_151622_125854_01CABAA9 X-CRM114-Status: GOOD ( 18.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In commit 44bd78dd2b88 ("irqchip/gic-v3: Disable pseudo NMIs on Mediatek devices w/ firmware issues") we added a method for detecting Mediatek devices with broken firmware and disabled pseudo-NMI. While that worked, it didn't address the problem at a deep enough level. The fundamental issue with this broken firmware is that it's not saving and restoring several important GICR registers. The current list is believed to be: * GICR_NUM_IPRIORITYR * GICR_CTLR * GICR_ISPENDR0 * GICR_ISACTIVER0 * GICR_NSACR Pseudo-NMI didn't work because it was the only thing (currently) in the kernel that relied on the broken registers, so forcing pseudo-NMI off was an effective fix. However, it could be observed that calling system_uses_irq_prio_masking() on these systems still returned "true". That caused confusion and led to the need for commit a07a59415217 ("arm64: smp: avoid NMI IPIs with broken MediaTek FW"). It's worried that the incorrect value returned by system_uses_irq_prio_masking() on these systems will continue to confuse future developers. Let's fix the issue a little more completely by disabling IRQ priorities at a deeper level in the kernel. Once we do this we can revert some of the other bits of code dealing with this quirk. Signed-off-by: Douglas Anderson --- arch/arm64/kernel/cpufeature.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 2806a2850e78..e35efab8efa9 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2094,9 +2094,30 @@ static int __init early_enable_pseudo_nmi(char *p) } early_param("irqchip.gicv3_pseudo_nmi", early_enable_pseudo_nmi); +static bool are_gic_priorities_broken(void) +{ + bool is_broken = false; + struct device_node *np; + + /* + * Detect broken Mediatek firmware that doesn't properly save and + * restore GIC priorities. + */ + np = of_find_compatible_node(NULL, NULL, "arm,gic-v3"); + if (np) { + is_broken = of_property_read_bool(np, "mediatek,broken-save-restore-fw"); + of_node_put(np); + } + + return is_broken; +} + static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry, int scope) { + if (are_gic_priorities_broken()) + return false; + /* * ARM64_HAS_GIC_CPUIF_SYSREGS has a lower index, and is a boot CPU * feature, so will be detected earlier.