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Mon, 16 Oct 2023 00:11:39 -0500 From: Thippeswamy Havalige To: , , , CC: , , , , , , , , Subject: [PATCH v5 RESEND 3/4] PCI: xilinx-nwl: Rename ECAM size default macro Date: Mon, 16 Oct 2023 10:41:01 +0530 Message-ID: <20231016051102.1180432-4-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231016051102.1180432-1-thippeswamy.havalige@amd.com> References: <20231016051102.1180432-1-thippeswamy.havalige@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EC:EE_|DM4PR12MB7597:EE_ X-MS-Office365-Filtering-Correlation-Id: c14822e7-13ea-4a79-13fc-08dbce06638f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vCDoZvNy6ovvi5dnC/bu5NLRdkg04E0eRas2k171ZqXcWgD2CUyLTDtcr9g6OPbuYvjbN9UCKztvcVwPAud/8hUYB5qhmMqRzQzWMyar1o+QsNRviVA8xFoclS2FPeSHTnr12WCNN/1jDGvcymZd3T0p3a1g+aOMX0ntqJ/cuuU4kAMg5OzbpgwDqns3Bc8znPjZX+7OlCBw++VxB3AMzR9KjU7w8px74KXsF3gCw2j6/96VOBDG2S9/8+UuA6pSCwXpA2lie/iXjn/584Jd2ysg+MpT+5HPvamAyOECb6dJWSh478XnBw6kWLtqHYruN69S7WEwuPohNgjY4wc76p6xpyBpSjUUwn41sZlgYxy0qfZg89PzLH6US1u7aC8IP5aU8GoIAbbwMEVXT0zNTSU/53wkShnmJlZVU7EupDrGbXaFVhtPeRflWcqISyhlAcYzESt09/MiZfVxnePahwrYZmNn6zkK+/HRlN8C5Q66UvdYEnUMzoFfKwEtzS13x5MRa9coXY0tf4QX/e+EZdkHruior0gnDEn8f0hOg53l4zqsaCjij6iUnPpQf7zjTaGCPppomSH9svql04IDdZSa6mSqyfTo8lUx1qRxMkJlFYlQhI61nS+rX8YoyPh1duGNGdlckYZy7l5fpt7GcoGemDEWWsLKdjdO4uuOUicnE5tvOOO+NZ9AjTMCybVQVNeplzUgpkmOfoc6EVmDLFh1LQOWg6tVOQZb5jnQU+ukw95Zl/AZKfYc7P1quNplvERqV6BuSR7R9qxJINi8xQLMPKiIr9ekA7F2ree+XCc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(346002)(136003)(39860400002)(376002)(230922051799003)(451199024)(82310400011)(64100799003)(186009)(1800799009)(46966006)(40470700004)(36840700001)(40460700003)(40480700001)(82740400003)(36756003)(81166007)(356005)(36860700001)(47076005)(83380400001)(6666004)(26005)(426003)(70586007)(70206006)(316002)(54906003)(478600001)(1076003)(336012)(2616005)(110136005)(7416002)(44832011)(41300700001)(2906002)(86362001)(5660300002)(8936002)(8676002)(4326008)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2023 05:11:43.7097 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c14822e7-13ea-4a79-13fc-08dbce06638f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EC.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7597 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231015_221149_855613_58847B86 X-CRM114-Status: GOOD ( 12.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Rename "NWL_ECAM_VALUE_DEFAULT" to a suitable macro name and remove redundant code Signed-off-by: Thippeswamy Havalige --- changes in v5: Remove period at end of subject line. --- drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index d8a3a08be1d5..8fe0e8a325b0 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -126,7 +126,7 @@ #define E_ECAM_CR_ENABLE BIT(0) #define E_ECAM_SIZE_LOC GENMASK(20, 16) #define E_ECAM_SIZE_SHIFT 16 -#define NWL_ECAM_VALUE_DEFAULT 12 +#define NWL_ECAM_MAX_SIZE 12 #define CFG_DMA_REG_BAR GENMASK(2, 0) #define CFG_PCIE_CACHE GENMASK(7, 0) @@ -165,7 +165,6 @@ struct nwl_pcie { u32 ecam_size; int irq_intx; int irq_misc; - u32 ecam_value; struct nwl_msi msi; struct irq_domain *legacy_irq_domain; struct clk *clk; @@ -674,7 +673,7 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) E_ECAM_CR_ENABLE, E_ECAM_CONTROL); nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) | - (pcie->ecam_value << E_ECAM_SIZE_SHIFT), + (NWL_ECAM_MAX_SIZE << E_ECAM_SIZE_SHIFT), E_ECAM_CONTROL); nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_ecam_base), @@ -782,7 +781,6 @@ static int nwl_pcie_probe(struct platform_device *pdev) pcie = pci_host_bridge_priv(bridge); pcie->dev = dev; - pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT; err = nwl_pcie_parse_dt(pcie, pdev); if (err) {