Message ID | 20231017064717.21616-9-shawn.sung@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Support IGT in display driver | expand |
Hi, Hsiao-chien: Change the title to Support alpha blending in ethdr. On Tue, 2023-10-17 at 14:47 +0800, Hsiao Chien Sung wrote: > Support premultiply and coverage alpha blending modes. > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +- > drivers/gpu/drm/mediatek/mtk_ethdr.c | 48 +++++++++++++++ > ---- > 2 files changed, 39 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > index 8de57a5f5518..b69ac90b2e65 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > @@ -156,7 +156,7 @@ void mtk_ovl_adaptor_layer_config(struct device > *dev, unsigned int idx, > merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + > idx]; > ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; > > - if (!pending->enable) { > + if (!pending->enable || !pending->width || !pending->height) { This is not related to alpha blending, so move to another patch. > mtk_merge_stop_cmdq(merge, cmdq_pkt); > mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); > mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c > b/drivers/gpu/drm/mediatek/mtk_ethdr.c > index 73dc4da3ba3b..648e14e85bd0 100644 > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c > @@ -5,6 +5,7 @@ > > #include <drm/drm_fourcc.h> > #include <drm/drm_framebuffer.h> > +#include <drm/drm_blend.h> > #include <linux/clk.h> > #include <linux/component.h> > #include <linux/of_device.h> > @@ -35,6 +36,7 @@ > #define MIX_SRC_L0_EN BIT(0) > #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n)) > #define NON_PREMULTI_SOURCE (2 << 12) > +#define PREMULTI_SOURCE (3 << 12) > #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n)) > #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n)) > #define MIX_FUNC_DCM0 0x120 > @@ -153,33 +155,59 @@ void mtk_ethdr_layer_config(struct device *dev, > unsigned int idx, > struct mtk_plane_pending_state *pending = &state->pending; > unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 > | pending->x; > unsigned int align_width = ALIGN_DOWN(pending->width, 2); > - unsigned int alpha_con = 0; > + unsigned int mix_con = NON_PREMULTI_SOURCE; > + bool replace_src_a = false; > + > + union format { > + u32 raw; > + u8 str[5]; > + } format; You define this just to print raw, I think you could directly print raw and drop this. > > dev_dbg(dev, "%s+ idx:%d", __func__, idx); > > if (idx >= 4) > return; > > - if (!pending->enable) { > + if (!pending->enable || !pending->width || !pending->height) { > + /* > + * instead of disabling layer with MIX_SRC_CON directly > + * set the size to 0 to avoid screen shift due to mode > switch > + */ Is this related to alpha? If no, move this to another patch. If so, describe more detail why alpha need this change? > mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer- > >regs, MIX_L_SRC_SIZE(idx)); > return; > } > > - if (state->base.fb && state->base.fb->format->has_alpha) > - alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; > + mix_con |= MIXER_ALPHA_AEN | (state->base.alpha & MIXER_ALPHA); > + > + if (state->base.pixel_blend_mode != DRM_MODE_BLEND_COVERAGE) > + mix_con |= PREMULTI_SOURCE; > + > + if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE > || > + (state->base.fb && !state->base.fb->format->has_alpha)) { > + /* > + * Mixer doesn't support CONST_BLD mode, > + * use a trick to make the output equivalent > + */ > + replace_src_a = true; > + } > + > + format.raw = pending->format; > + > + dev_dbg(dev, "L%d: %ux%u(%u,%u)%s: SCA=0x%x(%u), MIX=0x%x\n", > idx, > + pending->width, pending->height, pending->x, pending- > >y, > + format.str, (state->base.alpha & MIXER_ALPHA), > + state->base.pixel_blend_mode, mix_con); I do not like per frame log message. Even it would not print by log level, it would be record to log buffer and dmesg would show it. So drop this. > > - mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? > false : true, > - DEFAULT_9BIT_ALPHA, > + mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, > replace_src_a, MIXER_ALPHA, > pending->x & 1 ? > MIXER_INX_MODE_EVEN_EXTEND : > MIXER_INX_MODE_BYPASS, align_width / > 2 - 1, cmdq_pkt); > > mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, > &mixer->cmdq_base, > mixer->regs, MIX_L_SRC_SIZE(idx)); > mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, > MIX_L_SRC_OFFSET(idx)); > - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, > mixer->regs, MIX_L_SRC_CON(idx), > - 0x1ff); > - mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, > mixer->regs, MIX_SRC_CON, > - BIT(idx)); > + mtk_ddp_write(cmdq_pkt, mix_con, &mixer->cmdq_base, mixer- > >regs, MIX_L_SRC_CON(idx)); > + mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, > mixer->regs, > + MIX_SRC_CON, BIT(idx)); This is not related to alpha, so do not modify this. Regards, CK > } > > void mtk_ethdr_config(struct device *dev, unsigned int w,
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c index 8de57a5f5518..b69ac90b2e65 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -156,7 +156,7 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { mtk_merge_stop_cmdq(merge, cmdq_pkt); mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c index 73dc4da3ba3b..648e14e85bd0 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -5,6 +5,7 @@ #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> +#include <drm/drm_blend.h> #include <linux/clk.h> #include <linux/component.h> #include <linux/of_device.h> @@ -35,6 +36,7 @@ #define MIX_SRC_L0_EN BIT(0) #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n)) #define NON_PREMULTI_SOURCE (2 << 12) +#define PREMULTI_SOURCE (3 << 12) #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n)) #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n)) #define MIX_FUNC_DCM0 0x120 @@ -153,33 +155,59 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_pending_state *pending = &state->pending; unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 | pending->x; unsigned int align_width = ALIGN_DOWN(pending->width, 2); - unsigned int alpha_con = 0; + unsigned int mix_con = NON_PREMULTI_SOURCE; + bool replace_src_a = false; + + union format { + u32 raw; + u8 str[5]; + } format; dev_dbg(dev, "%s+ idx:%d", __func__, idx); if (idx >= 4) return; - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { + /* + * instead of disabling layer with MIX_SRC_CON directly + * set the size to 0 to avoid screen shift due to mode switch + */ mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); return; } - if (state->base.fb && state->base.fb->format->has_alpha) - alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; + mix_con |= MIXER_ALPHA_AEN | (state->base.alpha & MIXER_ALPHA); + + if (state->base.pixel_blend_mode != DRM_MODE_BLEND_COVERAGE) + mix_con |= PREMULTI_SOURCE; + + if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || + (state->base.fb && !state->base.fb->format->has_alpha)) { + /* + * Mixer doesn't support CONST_BLD mode, + * use a trick to make the output equivalent + */ + replace_src_a = true; + } + + format.raw = pending->format; + + dev_dbg(dev, "L%d: %ux%u(%u,%u)%s: SCA=0x%x(%u), MIX=0x%x\n", idx, + pending->width, pending->height, pending->x, pending->y, + format.str, (state->base.alpha & MIXER_ALPHA), + state->base.pixel_blend_mode, mix_con); - mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true, - DEFAULT_9BIT_ALPHA, + mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, replace_src_a, MIXER_ALPHA, pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND : MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt); mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx)); - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx), - 0x1ff); - mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON, - BIT(idx)); + mtk_ddp_write(cmdq_pkt, mix_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx)); + mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, + MIX_SRC_CON, BIT(idx)); } void mtk_ethdr_config(struct device *dev, unsigned int w,
Support premultiply and coverage alpha blending modes. Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> --- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +- drivers/gpu/drm/mediatek/mtk_ethdr.c | 48 +++++++++++++++---- 2 files changed, 39 insertions(+), 11 deletions(-)