From patchwork Mon Oct 30 03:55:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Furong Xu <0x1207@gmail.com> X-Patchwork-Id: 13439962 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 96AABC4332F for ; Mon, 30 Oct 2023 03:56:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=vaEsytPzCIQ4c4j+Re1uc6s+CrWIvfyoUn2vU0IO2f8=; b=udYNoLapdkIxNr bO9+ycrmQDWx6RtVMcS7UHmTl/MMEnaN4URprfHgd9mbVqvn6a2g3+SepeUTimMX3qsrUgnz8bgK7 WyeerKyI8oqA0DeZSP61LTJlepaD2N8t/bOucfsprFrTpdD5PnrBFGdLsLiar/p4/SVIQ4MOSWTt6 N5JetOqOftMl4RqfgkXwwbWlPk8hbYXpIiPU+xsDu+Oi3+hRzJzRxlDXClGQD4ShkaXgLswMPzLA8 f0OO2Y7ZAvFkT4mVLF7WHUsQU8Ys4bRygxWz3I/xZimVYqykO9lc36/PO4y0BNMSnQCUX6zxOidou ga80pcnLGmneiXL/op7A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qxJNx-002VwK-0x; Mon, 30 Oct 2023 03:56:17 +0000 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qxJNu-002Vw0-2S for linux-arm-kernel@lists.infradead.org; Mon, 30 Oct 2023 03:56:16 +0000 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1c9b95943beso35924905ad.1 for ; Sun, 29 Oct 2023 20:56:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1698638173; x=1699242973; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=y2LKPRDN6GCfDpHNmFLj1e87YJK73PiRp76sihBNMTM=; b=RZ+TwzsM3/YFOF/2iCgfgr78Tq7Ps4UdzOF25ZHBUtf3Vrq6RBsv6i/Ndj4wV1iYaa y3HArhe6IIs5s/0JEzTRwZdv4VaI3B9648oJwK3MsrsA9NPF8DBOBvkVC3oX7bN/3M1t atBdOzzGJ937vHtB1vrUGASJnz8d+CEaVnwFw19vWmIsI6slcIb8y387dXyLu/olGZTY 6UwkXTT1i370qWh94USH/AH8T1Hs+/8LBImRacd96Sbyu4B4fltb1Qs7QQsWr17mvQue bg7MZKuzrvwRnGvLbAdO0vWvMP5FnrQ8o1N5HibPULfKfUzMqG6TdOuhFIewQINJu6De bIXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698638173; x=1699242973; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=y2LKPRDN6GCfDpHNmFLj1e87YJK73PiRp76sihBNMTM=; b=ScY1yCnAjzD+Bi1fC4Va1SoFPIhz5klBphlQ5ytrwtJy/B3xsLX1zpblQusipvGTWY P1UbsCy8cNAzgwFUcsXxZS3ZWTNJS3C0wQnIEziQKZnE7Xs6dZVYLR3JbR6XFdq9gpBl fwriiubHU1PKFirxeomXzeYI1GvRTAGlYXH6Il2BK6nizCh+1eUGRgl74qIoDcNqr4fx HcaTluMBps1JPYOJqz5Y2VPp84GkK/M8vrReDiDj694BS83s6ZYe90kwrW8FzVWY2Ak2 1HuDYfWHP5aVYLcZiBBgbMlAAIqyBs/kGU0FhxsOM84shFMEQjA/sxu94S8bI/t7jo24 UYVA== X-Gm-Message-State: AOJu0Yzlg7RWG3JwFF3tPDr6IzcrA1HwpUuSI6/yeAZkVFzd2DZj82mH UqgvoohleU3G3xbPWZsar0Y= X-Google-Smtp-Source: AGHT+IFtziW0YEt+qaY773vj4t1QmwQ2WxPAPa4J4C8WbaX4O7OoKTqUrQZRKxurTVOpf3PHJN/cmQ== X-Received: by 2002:a17:903:2054:b0:1cc:4146:9ecb with SMTP id q20-20020a170903205400b001cc41469ecbmr2679315pla.47.1698638173229; Sun, 29 Oct 2023 20:56:13 -0700 (PDT) Received: from localhost.localdomain ([74.48.130.204]) by smtp.googlemail.com with ESMTPSA id f7-20020a170902860700b001ca773d674bsm5159445plo.278.2023.10.29.20.56.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Oct 2023 20:56:12 -0700 (PDT) From: Furong Xu <0x1207@gmail.com> To: "David S. Miller" , Alexandre Torgue , Jose Abreu , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Joao Pinto , Simon Horman , Jacob Keller , Serge Semin Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, xfr@outlook.com, rock.xu@nio.com, Furong Xu <0x1207@gmail.com> Subject: [PATCH net-next v2] net: stmmac: xgmac: Enable support for multiple Flexible PPS outputs Date: Mon, 30 Oct 2023 11:55:50 +0800 Message-Id: <20231030035550.2340514-1-0x1207@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231029_205614_826527_55AD8E5C X-CRM114-Status: GOOD ( 14.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From XGMAC Core 3.20 and later, each Flexible PPS has individual PPSEN bit to select Fixed mode or Flexible mode. The PPSEN must be set, or it stays in Fixed PPS mode by default. XGMAC Core prior 3.20, only PPSEN0(bit 4) is writable. PPSEN{1,2,3} are read-only reserved, and they are already in Flexible mode by default, our new code always set PPSEN{1,2,3} do not make things worse ;-) Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Serge Semin --- Changes in v2: - Add comment for XGMAC_PPSEN description among different XGMAC core versions. - Update commit message, thanks Serge Semin and Jacob Keller for your advices. --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +- .../net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 14 +++++++++++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 7a8f47e7b728..a4e8b498dea9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -259,7 +259,7 @@ ((val) << XGMAC_PPS_MINIDX(x)) #define XGMAC_PPSCMD_START 0x2 #define XGMAC_PPSCMD_STOP 0x5 -#define XGMAC_PPSEN0 BIT(4) +#define XGMAC_PPSENx(x) BIT(4 + (x) * 8) #define XGMAC_PPSx_TARGET_TIME_SEC(x) (0x00000d80 + (x) * 0x10) #define XGMAC_PPSx_TARGET_TIME_NSEC(x) (0x00000d84 + (x) * 0x10) #define XGMAC_TRGTBUSY0 BIT(31) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index f352be269deb..453e88b75be0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -1178,7 +1178,19 @@ static int dwxgmac2_flex_pps_config(void __iomem *ioaddr, int index, val |= XGMAC_PPSCMDx(index, XGMAC_PPSCMD_START); val |= XGMAC_TRGTMODSELx(index, XGMAC_PPSCMD_START); - val |= XGMAC_PPSEN0; + + /* XGMAC Core has 4 PPS outputs at most. + * + * Prior XGMAC Core 3.20, Fixed mode or Flexible mode are selectable for + * PPS0 only via PPSEN0. PPS{1,2,3} are in Flexible mode by default, + * and can not be switched to Fixed mode, since PPSEN{1,2,3} are + * read-only reserved to 0. + * But we always set PPSEN{1,2,3} do not make things worse ;-) + * + * From XGMAC Core 3.20 and later, PPSEN{0,1,2,3} are writable and must + * be set, or the PPS outputs stay in Fixed PPS mode by default. + */ + val |= XGMAC_PPSENx(index); writel(cfg->start.tv_sec, ioaddr + XGMAC_PPSx_TARGET_TIME_SEC(index));