diff mbox series

[v7,03/11] arm64: dts: imx8ulp-evk: added nxp secure enclave firmware

Message ID 20231030095849.3456820-4-pankaj.gupta@nxp.com (mailing list archive)
State New, archived
Headers show
Series firmware: imx: NXP Secure-Enclave FW Driver | expand

Commit Message

Pankaj Gupta Oct. 30, 2023, 9:58 a.m. UTC
Added support for NXP secure enclave called EdgeLock Enclave
firmware (se-fw) for imx8ulp-evk.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski Oct. 30, 2023, 5:52 p.m. UTC | #1
On 30/10/2023 10:58, Pankaj Gupta wrote:
> Added support for NXP secure enclave called EdgeLock Enclave
> firmware (se-fw) for imx8ulp-evk.
> 
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index 946f2b68d16f..7b66de3a392d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -152,7 +152,7 @@ sosc: clock-sosc {
>  		#clock-cells = <0>;
>  	};
>  
> -	sram@2201f000 {
> +	sram0: sram@2201f000 {
>  		compatible = "mmio-sram";
>  		reg = <0x0 0x2201f000 0x0 0x1000>;
>  
> @@ -578,4 +578,12 @@ gpiod: gpio@2e200080 {
>  			gpio-ranges = <&iomuxc1 0 0 24>;
>  		};
>  	};
> +
> +	ele_fw2: se-fw2 {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 946f2b68d16f..7b66de3a392d 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -152,7 +152,7 @@  sosc: clock-sosc {
 		#clock-cells = <0>;
 	};
 
-	sram@2201f000 {
+	sram0: sram@2201f000 {
 		compatible = "mmio-sram";
 		reg = <0x0 0x2201f000 0x0 0x1000>;
 
@@ -578,4 +578,12 @@  gpiod: gpio@2e200080 {
 			gpio-ranges = <&iomuxc1 0 0 24>;
 		};
 	};
+
+	ele_fw2: se-fw2 {
+		compatible = "fsl,imx8ulp-se-fw";
+		mbox-names = "tx", "rx";
+		mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
+		sram = <&sram0>;
+	};
+
 };