From patchwork Tue Nov 21 09:25:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yicong Yang X-Patchwork-Id: 13462673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81D25C5ACB3 for ; Tue, 21 Nov 2023 09:30:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=f7nkSvpwDyuqxFoFVedRPQsSPjjTdtukSfGy5bnH1+I=; b=wF/tLrTtIlo+hL HImNpX9gv9MAfzgZi6cBZupl/J3OvilU9xw2mphzErRgRyNmrgRH9F9lFV67pl8jaPAWynP3yLDVw xvYqm53Oy4YgiSo4HTOODD4tS3FBYSBr4+KF2oEUWPmDFgRQ/JAnXyaRGUVZ0HGkhvuwY6BtvOmuZ lN0yYUn2nLvWeGFF6Q2szNIPa61h5qUSfku+01EALiK9zbOA4bo2HjC4J+UheH1NIMAl44T+XxhnV zWayJyQf/TMh5j2TdMF0pcsf5nVdS7qvWS4T9uqpuR5m9fbjeTih82pgUjR6VjTGHie3ci20kRORH NV5h4hgGU63Qocz0K1+g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r5N4f-00G8hU-2i; Tue, 21 Nov 2023 09:29:41 +0000 Received: from szxga01-in.huawei.com ([45.249.212.187]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r5N4T-00G8ah-1k for linux-arm-kernel@lists.infradead.org; Tue, 21 Nov 2023 09:29:33 +0000 Received: from canpemm500009.china.huawei.com (unknown [172.30.72.54]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4SZJrw0K7BzsRPH; Tue, 21 Nov 2023 17:25:52 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 21 Nov 2023 17:29:19 +0800 From: Yicong Yang To: , , , CC: , , , , , , , Subject: [PATCH v4 1/4] arch_topology: Support basic SMT control for the driver Date: Tue, 21 Nov 2023 17:25:59 +0800 Message-ID: <20231121092602.47792-2-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20231121092602.47792-1-yangyicong@huawei.com> References: <20231121092602.47792-1-yangyicong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.50.165.33] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231121_012929_935452_9B826C9E X-CRM114-Status: GOOD ( 19.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Yicong Yang The core CPU control framework supports runtime SMT control which is not yet supported by arch_topology driver and thus arch_topology based architectures. This patch implements it in the following aspects: - implement topology_is_primary_thread() to indicate the primary thread, required by the framework - architecture code can get/set the SMT thread number by topology_smt_{get, set}_num_threads() - update the SMT thread number for the framework after the topology enumerated on arm64, which is also required by the framework For disabling SMT we'll offline all the secondary threads and only leave the primary thread. Since we don't have restriction for primary thread selection, the first thread is chosen as the primary thread in this implementation. This patch only implements the basic support for SMT control, which needs to collabrate with ACPI/OF based topology building to fully enable the feature. The SMT control will be enabled unless the correct SMT thread number is set and HOTPLUG_SMT kconfig is selected. Signed-off-by: Yicong Yang --- drivers/base/arch_topology.c | 38 +++++++++++++++++++++++++++++++++++ include/linux/arch_topology.h | 14 +++++++++++++ 2 files changed, 52 insertions(+) diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index b741b5ba82bd..3ed6bdf9460e 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -729,6 +729,36 @@ const struct cpumask *cpu_clustergroup_mask(int cpu) return &cpu_topology[cpu].cluster_sibling; } +#ifdef CONFIG_HOTPLUG_SMT + +/* Maximum threads number per-Core */ +static unsigned int topology_smt_num_threads = 1; + +void __init topology_smt_set_num_threads(unsigned int num_threads) +{ + topology_smt_num_threads = num_threads; +} + +unsigned int __init topology_smt_get_num_threads(void) +{ + return topology_smt_num_threads; +} + +/* + * On SMT Hotplug the primary thread of the SMT won't be disabled. For x86 they + * seem to have a primary thread for special purpose. For other arthitectures + * like arm64 there's no such restriction for a primary thread, so make the + * first thread in the SMT as the primary thread. + */ +bool topology_is_primary_thread(unsigned int cpu) +{ + if (cpu == cpumask_first(topology_sibling_cpumask(cpu))) + return true; + + return false; +} +#endif + void update_siblings_masks(unsigned int cpuid) { struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; @@ -841,6 +871,14 @@ void __init init_cpu_topology(void) reset_cpu_topology(); } + /* + * By this stage we get to know whether we support SMT or not, update + * the information for the core. We don't support + * CONFIG_SMT_NUM_THREADS_DYNAMIC so make the max_threads == num_threads. + */ + cpu_smt_set_num_threads(topology_smt_get_num_threads(), + topology_smt_get_num_threads()); + for_each_possible_cpu(cpu) { ret = fetch_cache_info(cpu); if (!ret) diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h index a07b510e7dc5..0367f3a61838 100644 --- a/include/linux/arch_topology.h +++ b/include/linux/arch_topology.h @@ -92,6 +92,20 @@ void update_siblings_masks(unsigned int cpu); void remove_cpu_topology(unsigned int cpuid); void reset_cpu_topology(void); int parse_acpi_topology(void); + +#ifdef CONFIG_HOTPLUG_SMT +bool topology_is_primary_thread(unsigned int cpu); +void topology_smt_set_num_threads(unsigned int num_threads); +unsigned int topology_smt_get_num_threads(void); +#else +static inline bool topology_is_primary_thread(unsigned int cpu) { return false; } +static inline void topology_smt_set_num_threads(unsigned int num_threads) { } +static inline unsigned int topology_smt_get_num_threads(void) +{ + return 1; +} +#endif + #endif #endif /* _LINUX_ARCH_TOPOLOGY_H_ */