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[1/3] media: rkisp1: regs: Consolidate MI interrupt wrap fields

Message ID 20231129092956.250129-2-paul.elder@ideasonboard.com (mailing list archive)
State New, archived
Headers show
Series [1/3] media: rkisp1: regs: Consolidate MI interrupt wrap fields | expand

Commit Message

Paul Elder Nov. 29, 2023, 9:29 a.m. UTC
Consolidate the wraparound fields in the memory interface interrupt
status registers, so that it can be more succinctly expressed by taking
the stream ID (main or self) as a parameter.

Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
---
 drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Kieran Bingham Nov. 29, 2023, 8:03 p.m. UTC | #1
Quoting Paul Elder (2023-11-29 09:29:54)
> Consolidate the wraparound fields in the memory interface interrupt
> status registers, so that it can be more succinctly expressed by taking
> the stream ID (main or self) as a parameter.
> 
> Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>

Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>

> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 350f452e676f..bea69a0d766a 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -172,12 +172,9 @@
>  #define RKISP1_CIF_MI_FRAME(stream)                    BIT((stream)->id)
>  #define RKISP1_CIF_MI_MBLK_LINE                                BIT(2)
>  #define RKISP1_CIF_MI_FILL_MP_Y                                BIT(3)
> -#define RKISP1_CIF_MI_WRAP_MP_Y                                BIT(4)
> -#define RKISP1_CIF_MI_WRAP_MP_CB                       BIT(5)
> -#define RKISP1_CIF_MI_WRAP_MP_CR                       BIT(6)
> -#define RKISP1_CIF_MI_WRAP_SP_Y                                BIT(7)
> -#define RKISP1_CIF_MI_WRAP_SP_CB                       BIT(8)
> -#define RKISP1_CIF_MI_WRAP_SP_CR                       BIT(9)
> +#define RKISP1_CIF_MI_WRAP_Y(stream)                   BIT(4 + (stream)->id * 3)
> +#define RKISP1_CIF_MI_WRAP_CB(stream)                  BIT(5 + (stream)->id * 3)
> +#define RKISP1_CIF_MI_WRAP_CR(stream)                  BIT(6 + (stream)->id * 3)
>  #define RKISP1_CIF_MI_DMA_READY                                BIT(11)
>  
>  /* MI_STATUS */
> -- 
> 2.39.2
>
Laurent Pinchart Nov. 30, 2023, 1:45 p.m. UTC | #2
Hi Paul,

Thank you for the patch.

On Wed, Nov 29, 2023 at 06:29:54PM +0900, Paul Elder wrote:
> Consolidate the wraparound fields in the memory interface interrupt
> status registers, so that it can be more succinctly expressed by taking
> the stream ID (main or self) as a parameter.
> 
> Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 350f452e676f..bea69a0d766a 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -172,12 +172,9 @@
>  #define RKISP1_CIF_MI_FRAME(stream)			BIT((stream)->id)
>  #define RKISP1_CIF_MI_MBLK_LINE				BIT(2)
>  #define RKISP1_CIF_MI_FILL_MP_Y				BIT(3)
> -#define RKISP1_CIF_MI_WRAP_MP_Y				BIT(4)
> -#define RKISP1_CIF_MI_WRAP_MP_CB			BIT(5)
> -#define RKISP1_CIF_MI_WRAP_MP_CR			BIT(6)
> -#define RKISP1_CIF_MI_WRAP_SP_Y				BIT(7)
> -#define RKISP1_CIF_MI_WRAP_SP_CB			BIT(8)
> -#define RKISP1_CIF_MI_WRAP_SP_CR			BIT(9)
> +#define RKISP1_CIF_MI_WRAP_Y(stream)			BIT(4 + (stream)->id * 3)
> +#define RKISP1_CIF_MI_WRAP_CB(stream)			BIT(5 + (stream)->id * 3)
> +#define RKISP1_CIF_MI_WRAP_CR(stream)			BIT(6 + (stream)->id * 3)
>  #define RKISP1_CIF_MI_DMA_READY				BIT(11)
>  
>  /* MI_STATUS */
diff mbox series

Patch

diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 350f452e676f..bea69a0d766a 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -172,12 +172,9 @@ 
 #define RKISP1_CIF_MI_FRAME(stream)			BIT((stream)->id)
 #define RKISP1_CIF_MI_MBLK_LINE				BIT(2)
 #define RKISP1_CIF_MI_FILL_MP_Y				BIT(3)
-#define RKISP1_CIF_MI_WRAP_MP_Y				BIT(4)
-#define RKISP1_CIF_MI_WRAP_MP_CB			BIT(5)
-#define RKISP1_CIF_MI_WRAP_MP_CR			BIT(6)
-#define RKISP1_CIF_MI_WRAP_SP_Y				BIT(7)
-#define RKISP1_CIF_MI_WRAP_SP_CB			BIT(8)
-#define RKISP1_CIF_MI_WRAP_SP_CR			BIT(9)
+#define RKISP1_CIF_MI_WRAP_Y(stream)			BIT(4 + (stream)->id * 3)
+#define RKISP1_CIF_MI_WRAP_CB(stream)			BIT(5 + (stream)->id * 3)
+#define RKISP1_CIF_MI_WRAP_CR(stream)			BIT(6 + (stream)->id * 3)
 #define RKISP1_CIF_MI_DMA_READY				BIT(11)
 
 /* MI_STATUS */