From patchwork Mon Jan 29 11:47:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13535423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64DE7C47DA9 for ; Mon, 29 Jan 2024 11:48:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1+reoL0dteb2KyE582x2pGXk19va33Zb6nIgBVdOcmM=; b=RSdkqR0z7E/b9f aqRejSTC6ARDi9ZonJ5X5owVaNoNH7e9hwMb8TTHAfpPRQl97uymKIyGd2LpgeHO4GFnracnf7sjt /XRcyR+C7/qoIPsbs9zd0w53BYvR6x456gMrtWk9iUeZQPdqXeETcYj3rpAhUzlh2pn169iD9TlBw QlTj49O88xRWfq0+8uv1+DZq06g+nbFAnSUwfYqtyMGLwOkos5YrMK3WwPm5tjgq5a1lhLp0vWWPH E55JjZIRgmUPIdHVZKDUiex9XnBcvf380vq+tp4pQZoIue0gA4HsAUmaMhuih3EHdDYpPiL1D+SW2 BeT+pN7gNsSnFz41IZpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rUQ7b-0000000CS9i-1Ci1; Mon, 29 Jan 2024 11:48:15 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rUQ7S-0000000CS6u-0sdF for linux-arm-kernel@lists.infradead.org; Mon, 29 Jan 2024 11:48:07 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40TBm1ll107261; Mon, 29 Jan 2024 05:48:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706528881; bh=MoCRQYVZEX+Mr8OkesIHLNljp9ihpwaEzEO3zAB3r08=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MYKkUPFYdGGGVY+DOiIV10jYF1/i9KCFULKXZokh5EFGNf1UpUbXalk3jH4IMFkdP 5kI2IN9t/sj2jUvsGRlRFOdCRrdt57o+wDHhgC0R9QZtjyV0DBgLJ/yszRO0lOuiaF NvoTTZJakw2n2I6q/lIYZDh3K87wVRiXVEWIj+s8= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40TBm1Ta023321 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Jan 2024 05:48:01 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 29 Jan 2024 05:48:00 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 29 Jan 2024 05:48:00 -0600 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40TBloqR029678; Mon, 29 Jan 2024 05:47:57 -0600 From: Siddharth Vadapalli To: , , , , , CC: , , , , , Subject: [PATCH 2/3] arm64: dts: ti: k3-j784s4-evm: Enable PCIe0 and PCIe1 in RC Mode Date: Mon, 29 Jan 2024 17:17:48 +0530 Message-ID: <20240129114749.1197579-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129114749.1197579-1-s-vadapalli@ti.com> References: <20240129114749.1197579-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240129_034806_382411_CE32FBF5 X-CRM114-Status: GOOD ( 10.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable PCIe0 and PCIe1 instances of PCIe in Root Complex mode of operation on J784S4 EVM. The lanes of PCIe0 are connected to Serdes1 instance of Serdes while the lanes of PCIe1 are connected to Serdes0 instance of Serdes in J784S4 SoC. Despite both PCIe instances supporting up to 4 Lanes, since the physical connections to the PCIe connector corresponding to the PCIe1 instance of PCIe are limited to 2 Lanes on the J784S4 EVM, update the "num-lanes" property of PCIe1 accordingly. Signed-off-by: Siddharth Vadapalli --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 46 ++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index f34b92acc56d..4b94fa348869 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -1081,3 +1081,49 @@ dp0_out: endpoint { }; }; }; + +&serdes0 { + status = "okay"; + serdes0_pcie1_link: phy@0 { + reg = <0>; + cdns,num-lanes = <4>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>, + <&serdes_wiz0 3>, <&serdes_wiz0 4>; + }; +}; + +&serdes_wiz0 { + status = "okay"; +}; + +&pcie1_rc { + status = "okay"; + num-lanes = <2>; + reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_pcie1_link>; + phy-names = "pcie-phy"; +}; + +&serdes1 { + status = "okay"; + serdes1_pcie0_link: phy@0 { + reg = <0>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; + }; +}; + +&serdes_wiz1 { + status = "okay"; +}; + +&pcie0_rc { + status = "okay"; + reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>; + phys = <&serdes1_pcie0_link>; + phy-names = "pcie-phy"; +};