From patchwork Mon Feb 5 19:47:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brandon Brnich X-Patchwork-Id: 13546159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20F41C48292 for ; Mon, 5 Feb 2024 19:47:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Tv6wlJXVyo4dOohBxkY1UkbZ2Pz2E3mPzOgbidaEv+w=; b=xc7DAlB7Z3c8f2 2WxK6J75IfOCXNQ3A20V7RsrncERjR3fSRcd8JxHpqgMdP3XcC72ozkg9QtpDSS9EJCUPDDp90SHN ihOyI2fN0c2VSSFue/gZKkZfJ3yuPg0y1Bh036gqlzBMMGKSSSEZBYJFw5Fv9dZ3AcoRuGM2y+OmG 7swMG/w/wfmHwIK+0VkLFt4vGkIoN8ILcNRwvmgyKukxaLgb4NHf/5sT0nSzi7IvddgOsmwJRCgQq 8ixse9rcXxvXrJDXDSDb2FQlnw0SwpdUYMLWxX53UNG6qxtRKYIpET6QZX7RPLkQJ0Rf2+QwiUexe rkYpX/nAIavohFs1Z+mQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rX4wH-00000004sCS-0p3r; Mon, 05 Feb 2024 19:47:33 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rX4w8-00000004s4r-2jkl for linux-arm-kernel@lists.infradead.org; Mon, 05 Feb 2024 19:47:26 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 415JlBPU019766; Mon, 5 Feb 2024 13:47:11 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707162431; bh=wvPLweGFzvDcFAzONTe7EnJRH4JgTHeLriN9Uav4nck=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=e//lc1Jmxc4C6Y4C33ooRu8QX50HMng7oW87uqtzeNv4aSGrcE4r63rE6VTyEn+ns NgAUUfGS/ILSdZ4tijV3BwTmN9lxCcpxGwskNaO+3CQS9OOXK2lcsyO6ODjMp8yO3o Gg+abRvK7h+s1zLxNVCq0Vx9lD1Cl9P0ovln7Rpg= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 415JlBZe075944 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 5 Feb 2024 13:47:11 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 5 Feb 2024 13:47:11 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 5 Feb 2024 13:47:10 -0600 Received: from udba0500997.dhcp.ti.com (udba0500997.dhcp.ti.com [128.247.81.249]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 415Jl90Y037073; Mon, 5 Feb 2024 13:47:10 -0600 From: Brandon Brnich To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Bjorn Andersson , Geert Uytterhoeven , Arnd Bergmann , Konrad Dybcio , Neil Armstrong , =?utf-8?q?N=C3=ADcolas_F_=2E_R_?= =?utf-8?q?=2E_A_=2E_Prado?= , Marek Szyprowski , , , , Darren Etheridge CC: Brandon Brnich Subject: [PATCH v4 1/4] arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder Node Date: Mon, 5 Feb 2024 13:47:03 -0600 Message-ID: <20240205194706.3605309-2-b-brnich@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240205194706.3605309-1-b-brnich@ti.com> References: <20240205194706.3605309-1-b-brnich@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240205_114724_856071_AE7EA9F9 X-CRM114-Status: UNSURE ( 9.34 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds support for the Wave521cl on the J784S4-evm. Signed-off-by: Brandon Brnich --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 18 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index f2b720ed1e4f..e628e748f215 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -662,6 +662,24 @@ main_i2c6: i2c@2060000 { status = "disabled"; }; + vpu0: video-codec@4210000 { + compatible = "ti,j721s2-wave521c", "cnm,wave521c"; + reg = <0x00 0x4210000 0x00 0x10000>; + interrupts = ; + clocks = <&k3_clks 241 2>; + clock-names = "vcodec"; + power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; + }; + + vpu1: video-codec@4220000 { + compatible = "ti,j721s2-wave521c", "cnm,wave521c"; + reg = <0x00 0x4220000 0x00 0x10000>; + interrupts = ; + clocks = <&k3_clks 242 2>; + clock-names = "vcodec"; + power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; + }; + main_sdhci0: mmc@4f80000 { compatible = "ti,j721e-sdhci-8bit"; reg = <0x00 0x04f80000 0x00 0x1000>, diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi index 4398c3a463e1..2f633721a0c6 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi @@ -235,6 +235,8 @@ cbass_main: bus@100000 { ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */ + <0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */ + <0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */ <0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/ <0x00 0x10000000 0x00 0x10000000 0x00 0x08000000>, /* PCIe0 DAT0 */ <0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */