From patchwork Thu Feb 8 11:31:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 13549674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80339C4828F for ; Thu, 8 Feb 2024 11:32:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=elhQimMgMJ+lBdw33AUM9YJtO/gm03/h87QWMb0UpEE=; b=uHM4FGlMlRzBuQ QdEPwZzeSA2h9z494+417ikYeqlP9K5il2Rua51+/U6AsRos8lPPIS72GIMHS23PjCGTDH0aICgvI fg6A6H7v9CmAjO/uHG2fgjpHg8X7iAbQThxHbVELESYa4W+3Q8e2vYzhbyCwXHsK+pm+lV527lWGY cf02/9jL4x2Goe/ZNyS3yp03iQp51vyVm7WddmCu0zZgWN0uN3FyOKWJLOZuXevyhrRGwmejNBdp0 Uc15ns+DyacXiUIEvM1P3d7dq5yAciNImdQZgW9uYSHbBFr6XzctniRw2yLEcp9LuT1drmrT+a2v9 ElUUcpSOJlR9d70qUcQQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rY2dW-0000000DZiF-4BdU; Thu, 08 Feb 2024 11:32:11 +0000 Received: from mgamail.intel.com ([192.198.163.15]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rY2dU-0000000DZag-0dcD for linux-arm-kernel@lists.infradead.org; Thu, 08 Feb 2024 11:32:09 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707391928; x=1738927928; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ltm4BNE1kVbTScZPdTe85e8QfDDAc7SPDrUZuF1fT8Y=; b=hj5ySAEHZXCfe9CnY1opBZQhutGn7q1xHD0LDiyuy8bshIo16AlOiKY1 xV/iN+Y7lnCphJjhhDB4/vfhfupGbWjxCFrbmGmBdz0mhCjP4HENk5Z8/ GSXHcF/ixR7a7liVTdDUM/I+iA/xoVI/G4uVaFi4lGJmeelN8Qbzt90IP W+W5B7eY2ghuZ4m9J6PS9kiV7INfQQ4uAMT/DT8FlEsLZIhlrilN3MUPZ L+807h4TG8bwqZ6/S63toKxXpbABXZJ1byYYqpj6recSw87cyjseM2fQG i5bkICOEMwu4gJPhQsxjpRdpPIja/+djWWcsJs1uFEcCaDJL5GnLvSqqK g==; X-IronPort-AV: E=McAfee;i="6600,9927,10977"; a="1345546" X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1345546" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 03:32:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1957506" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.251.219.88]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 03:32:02 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH V5 04/12] perf tools: Enable evsel__is_aux_event() to work for ARM/ARM64 Date: Thu, 8 Feb 2024 13:31:19 +0200 Message-Id: <20240208113127.22216-5-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240208113127.22216-1-adrian.hunter@intel.com> References: <20240208113127.22216-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240208_033208_263519_481F1C69 X-CRM114-Status: GOOD ( 12.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Set pmu->auxtrace on ARM/ARM64 AUX area PMUs. evsel__is_aux_event() needs the setting to identify AUX area tracing selected events. Currently, the features that use evsel__is_aux_event() are used only by Intel PT, but that may change in the future. Signed-off-by: Adrian Hunter Acked-by: Ian Rogers --- tools/perf/arch/arm/util/pmu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c index 8b7cb68ba1a8..668a4310cb69 100644 --- a/tools/perf/arch/arm/util/pmu.c +++ b/tools/perf/arch/arm/util/pmu.c @@ -20,16 +20,19 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused) #ifdef HAVE_AUXTRACE_SUPPORT if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) { /* add ETM default config here */ + pmu->auxtrace = true; pmu->selectable = true; pmu->perf_event_attr_init_default = cs_etm_get_default_config; #if defined(__aarch64__) } else if (strstarts(pmu->name, ARM_SPE_PMU_NAME)) { + pmu->auxtrace = true; pmu->selectable = true; pmu->is_uncore = false; pmu->perf_event_attr_init_default = arm_spe_pmu_default_config; if (!strcmp(pmu->name, "arm_spe_0")) pmu->mem_events = perf_mem_events_arm; } else if (strstarts(pmu->name, HISI_PTT_PMU_NAME)) { + pmu->auxtrace = true; pmu->selectable = true; #endif }