| Message ID | 20240209212816.11187-2-ddrokosov@salutedevices.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | meson-axg: properly setup CPU power management | expand |
On 09/02/2024 22:28, Dmitry Rokosov wrote: > The CPU cooling-cells property should be located in the meson-axg common > dtsi, as it is required for all AXG-based boards with DVFS. > > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> > --- > .../amlogic/meson-axg-jethome-jethub-j1xx.dtsi | 16 ---------------- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++++ > 2 files changed, 4 insertions(+), 16 deletions(-) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi > index db605f3a22b4..55802fb03a46 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi > @@ -332,19 +332,3 @@ &gpio { > "", "", "", "", "", // 80 - 84 > "", ""; // 85-86 > }; > - > -&cpu0 { > - #cooling-cells = <2>; > -}; > - > -&cpu1 { > - #cooling-cells = <2>; > -}; > - > -&cpu2 { > - #cooling-cells = <2>; > -}; > - > -&cpu3 { > - #cooling-cells = <2>; > -}; > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index 7e5ac9db93f8..ea96fef328e8 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -74,6 +74,7 @@ cpu0: cpu@0 { > enable-method = "psci"; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 0>; > + #cooling-cells = <2>; > }; > > cpu1: cpu@1 { > @@ -83,6 +84,7 @@ cpu1: cpu@1 { > enable-method = "psci"; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 0>; > + #cooling-cells = <2>; > }; > > cpu2: cpu@2 { > @@ -92,6 +94,7 @@ cpu2: cpu@2 { > enable-method = "psci"; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 0>; > + #cooling-cells = <2>; > }; > > cpu3: cpu@3 { > @@ -101,6 +104,7 @@ cpu3: cpu@3 { > enable-method = "psci"; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 0>; > + #cooling-cells = <2>; > }; > > l2: l2-cache0 { Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi index db605f3a22b4..55802fb03a46 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi @@ -332,19 +332,3 @@ &gpio { "", "", "", "", "", // 80 - 84 "", ""; // 85-86 }; - -&cpu0 { - #cooling-cells = <2>; -}; - -&cpu1 { - #cooling-cells = <2>; -}; - -&cpu2 { - #cooling-cells = <2>; -}; - -&cpu3 { - #cooling-cells = <2>; -}; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 7e5ac9db93f8..ea96fef328e8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -74,6 +74,7 @@ cpu0: cpu@0 { enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -83,6 +84,7 @@ cpu1: cpu@1 { enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -92,6 +94,7 @@ cpu2: cpu@2 { enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -101,6 +104,7 @@ cpu3: cpu@3 { enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; l2: l2-cache0 {
The CPU cooling-cells property should be located in the meson-axg common dtsi, as it is required for all AXG-based boards with DVFS. Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> --- .../amlogic/meson-axg-jethome-jethub-j1xx.dtsi | 16 ---------------- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++++ 2 files changed, 4 insertions(+), 16 deletions(-)