From patchwork Wed Feb 14 12:28:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13556413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C33CC48BC1 for ; Wed, 14 Feb 2024 12:30:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=S9vazj975O1MiVa3+5rFhIoV8m92gcLVNRCC4gEgawk=; b=OLaCS9KNN4cSLdlsu0g4s1rsnh GrtgDv7+TPixI3oC6THQighUyKXu1+MYVN97GDhO3auQ82gD3MCOVdsqjneOMkk+mnA+kb/+qb3F6 WpExYzP8rGLx3niYFc3iuWKifsEI8c9LW5ci8Dt4b0Rkoa//udNdG297pRvDr/XeMo4B6wij1sVTz eSRaepAqk9Qdce+c69CWv2+F/ECqBOvkJSlhAczFo8e8zOzeSDC4tfYDClugGCCahf0feqkPzTLqg /Y5V/u6oFOXsveNCmHIJGUXnc8P+j926DZ6vCDYCxgxsz1fSzuUQXWxbROnlwE2ZzRr4HtIVwOveY VDaQ6bjA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1raEPG-0000000Cof2-40Gu; Wed, 14 Feb 2024 12:30:30 +0000 Received: from mail-wm1-x349.google.com ([2a00:1450:4864:20::349]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1raEOp-0000000CoMe-2Ztr for linux-arm-kernel@lists.infradead.org; Wed, 14 Feb 2024 12:30:09 +0000 Received: by mail-wm1-x349.google.com with SMTP id 5b1f17b1804b1-411a8c8d9b2so13129625e9.0 for ; Wed, 14 Feb 2024 04:30:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1707913801; x=1708518601; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=C9PSY9iBLTlxzvPzjgB+0iHAKBZWgvNknFblEmIV87Y=; b=njT+TAHEwPBEhGwkgniOoqM5YbifUvHMzYCHQLZkjPOcNIVGsaRrxAIsIEiOwjzmTu 09W+jiX6ObVnjXqzkY2CD8CTOoYdq/tmqKt56AckCDixndHXISG01E0whOvEgiGbFZyI ps5bBevc5KJpPvqbRC2Z3xbJ6l/lU2sp5Ux7n3elRs71SwgGq4dqq9oouaJhlX9PP0YF vFOJdCHQhN+XxgQyXmBLZNr/HmZTv91ioKUlVpMhQdWqhWcS3x6S8eqjLxbs9/X+SiNQ cjNJThErxslVStZcRlct+U9Gej6BJj8syPmEPfI/dQeEYv+i2oVFFxclARlg5Mf/mE03 4exw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707913801; x=1708518601; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=C9PSY9iBLTlxzvPzjgB+0iHAKBZWgvNknFblEmIV87Y=; b=Rz1UygdyK7Aziex3a9HLtdbE6+JY+CWnPanPgKsJJ73eXwBQ3zPl2Q5O0XHU/D35Qw 8T+KQcN901ASVTwGg5M6QdvGcVywggKlfYm1ujqOLDbtBBrORY53IV8NuvbVT68dKk73 r1j4n6Ik+qtEHmjAXU/2sDKJ7r5Kf+Q3220839ehbyg2d2WHXeStjqf75iYg/WiV/8+r t0koBCmIOkYSnm2g2ZMcLG7/UE41xMR8GNsFfpkEMZAcctQta24CX1RKcKhAy3dO3Mf0 eDooqkxGHs1IObE/ikMocePr9vPSI/qJ2jSzJGDkIw0+4DsmYP9jxJO4UjwKBxgtdPx6 tvjQ== X-Gm-Message-State: AOJu0Yz7LOHP6vdB1u2O5sEBg01G1IEt5kUSwVy2Ws/hPNXwj5v458WS dkDsNmZcH9F+A6aPw7jBQaNCA0bfizl4Xk/hXrrVRWg2nFQJ3syvd97kLvDmB6bmRerDx1O4CeD 3kZkv4oE/YJD43D6ffyAFfqcOLkaFktH9MO5iylcVd/YwtT64B5zrJu5nKKYX7suJtdhIKWotRG SNCBlzZUIvxZXkrizuDOQ/KHgSECqTNySe/KZ/euEu X-Google-Smtp-Source: AGHT+IFEBPng4lnEtDmoR++NAyVLnTisbLTDcGyROmyMsDUAtddG4/xEAQrupjYM5reTKEQcxllW8SIM X-Received: from palermo.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:118a]) (user=ardb job=sendgmr) by 2002:a05:600c:a385:b0:411:ebf7:d0ff with SMTP id hn5-20020a05600ca38500b00411ebf7d0ffmr4767wmb.5.1707913801443; Wed, 14 Feb 2024 04:30:01 -0800 (PST) Date: Wed, 14 Feb 2024 13:28:56 +0100 In-Reply-To: <20240214122845.2033971-45-ardb+git@google.com> Mime-Version: 1.0 References: <20240214122845.2033971-45-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=3269; i=ardb@kernel.org; h=from:subject; bh=NcyALRdi0AS0TLQf1binGGCHuDJV0cdvb+ltyDJJPRg=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIfXMJs4/HvfS5zRx/ghu3vix4H1HdLNblcpXnh1950Lq1 yyX8jzWUcrCIMbBICumyCIw+++7nacnStU6z5KFmcPKBDKEgYtTACby2oHhf8XLR3bx0WafXQK4 ubQZ1ddu06hRPRcZ87+wOkLu70pRQ4a/8nvOK5gsiDTVTXVI33xHpPPvHw2X4+r+JxPZ9q9q8F3 JDgA= X-Mailer: git-send-email 2.43.0.687.g38aa6559b0-goog Message-ID: <20240214122845.2033971-55-ardb+git@google.com> Subject: [PATCH v8 10/43] arm64: cpufeature: Add helper to test for CPU feature overrides From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Catalin Marinas , Will Deacon , Marc Zyngier , Mark Rutland , Ryan Roberts , Anshuman Khandual , Kees Cook X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240214_043003_926870_0D44DD81 X-CRM114-Status: GOOD ( 18.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ard Biesheuvel Add some helpers to extract and apply feature overrides to the bare idreg values. This involves inspecting the value and mask of the specific field that we are interested in, given that an override value/mask pair might be invalid for one field but valid for another. Then, wire up the new helper for the hVHE test - note that we can drop the sysreg test here, as the override will be invalid when trying to enable hVHE on non-VHE capable hardware. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/cpufeature.h | 39 ++++++++++++++++++++ arch/arm64/kernel/cpufeature.c | 9 +---- 2 files changed, 40 insertions(+), 8 deletions(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 21c824edf8ce..acd8f4949583 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -915,6 +915,45 @@ extern struct arm64_ftr_override id_aa64isar2_override; extern struct arm64_ftr_override arm64_sw_feature_override; +static inline +u64 arm64_apply_feature_override(u64 val, int feat, int width, + const struct arm64_ftr_override *override) +{ + u64 oval = override->val; + + /* + * When it encounters an invalid override (e.g., an override that + * cannot be honoured due to a missing CPU feature), the early idreg + * override code will set the mask to 0x0 and the value to non-zero for + * the field in question. In order to determine whether the override is + * valid or not for the field we are interested in, we first need to + * disregard bits belonging to other fields. + */ + oval &= GENMASK_ULL(feat + width - 1, feat); + + /* + * The override is valid if all value bits are accounted for in the + * mask. If so, replace the masked bits with the override value. + */ + if (oval == (oval & override->mask)) { + val &= ~override->mask; + val |= oval; + } + + /* Extract the field from the updated value */ + return cpuid_feature_extract_unsigned_field(val, feat); +} + +static inline bool arm64_test_sw_feature_override(int feat) +{ + /* + * Software features are pseudo CPU features that have no underlying + * CPUID system register value to apply the override to. + */ + return arm64_apply_feature_override(0, feat, 4, + &arm64_sw_feature_override); +} + u32 get_kvm_ipa_limit(void); void dump_cpu_features(void); diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index a99ad79adee2..d0ffb872a31a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2042,14 +2042,7 @@ static bool has_nested_virt_support(const struct arm64_cpu_capabilities *cap, static bool hvhe_possible(const struct arm64_cpu_capabilities *entry, int __unused) { - u64 val; - - val = read_sysreg(id_aa64mmfr1_el1); - if (!cpuid_feature_extract_unsigned_field(val, ID_AA64MMFR1_EL1_VH_SHIFT)) - return false; - - val = arm64_sw_feature_override.val & arm64_sw_feature_override.mask; - return cpuid_feature_extract_unsigned_field(val, ARM64_SW_FEATURE_OVERRIDE_HVHE); + return arm64_test_sw_feature_override(ARM64_SW_FEATURE_OVERRIDE_HVHE); } #ifdef CONFIG_ARM64_PAN