From patchwork Thu Feb 15 08:32:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 13557643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16DF0C48BEB for ; Thu, 15 Feb 2024 08:33:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=E4Fe/k64Ks6idCxjImbsHYzCwIBucNehBsFC/cgNev8=; b=e4m9+uno6RuyNN +OZo2eT8Mm9sPTcbdW0EyfZjft1Q0SiD+CKmh9uygYmeIOACK6LZSMUwKmjdjuvykwPGqSZxiWRKc WHCAHHB0AdtEjb+wMBpJhRs+D6fM7tTql+/erL/a+lPX9tlNThzWI/jbtL3+yFdwVxpv0FayJZIgg P2VMpdh4ekNJ250hoPKk0MiLvLeGpGc0hHUgLaRyYrWUZTnUSwjRe8oCYhi5ZDzIHCsdcuKVYZ9Pn Jij756nv79RYqkvpwLYJvg91LToL2B8c/C2OZP/ugMrEnLSdnolkP8TBJUtt9Vlwg1Fh1iSEDCRUY MSbddc5+GrkoNdcg7Srg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1raXAp-0000000FM19-0Yz5; Thu, 15 Feb 2024 08:32:51 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1raXAm-0000000FLyF-0o58 for linux-arm-kernel@lists.infradead.org; Thu, 15 Feb 2024 08:32:49 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41F8W9nN041977; Thu, 15 Feb 2024 02:32:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707985929; bh=dhGYY3G/DrUwrWyrm5dmRSYgmfU1stnJgcj6QYV18GQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=purw5bOUsiqRnMiVBpyW1yQEemio5EG/cQG3GKX+YhHzHBi5MgAhboH33N5nmRHT1 hZPrpc42dK4vi3XS7lMaWLrPN8FHhoVwzQLAk/MRwDkiGGsrH2va0BiGnvh7tlNVdH 024RWSvyyAvcvsecckYDQ3QIvJpGzeNbb9OSpR9Q= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41F8W8dD036845 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 02:32:09 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 02:32:08 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 02:32:08 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41F8W75Q022078; Thu, 15 Feb 2024 02:32:08 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v3 1/2] dt-bindings: display: ti,am65x-dss: Add support for common1 region Date: Thu, 15 Feb 2024 14:02:04 +0530 Message-ID: <20240215083205.2902634-2-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215083205.2902634-1-devarsht@ti.com> References: <20240215083205.2902634-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240215_003248_351786_E7BAD1D1 X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org TI keystone display subsystem present in AM65 and other SoCs such as AM62 support two separate register spaces namely "common" and "common1" which can be used by two separate hosts to program the display controller as described in respective Technical Reference Manuals [1]. The common1 register space has similar set of configuration registers as supported in common register space except the global configuration registers which are exclusive to common region. This adds binding for "common1" register region too as supported by the hardware. [1]: AM62x TRM: https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers) AM65x TRM: https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers) Fixes: 2d8730f1021f ("dt-bindings: display: ti,am65x-dss: Add dt-schema yaml binding") Signed-off-by: Devarsh Thakkar Acked-by: Conor Dooley Reviewed-by: Aradhya Bhatia --- V2: Add Acked-by tag V3: Add Fixes tag --- .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index b6767ef0d24d..55e3e490d0e6 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -37,6 +37,7 @@ properties: - description: OVR2 overlay manager for vp2 - description: VP1 video port 1 - description: VP2 video port 2 + - description: common1 DSS register area reg-names: items: @@ -47,6 +48,7 @@ properties: - const: ovr2 - const: vp1 - const: vp2 + - const: common1 clocks: items: @@ -147,9 +149,10 @@ examples: <0x04a07000 0x1000>, /* ovr1 */ <0x04a08000 0x1000>, /* ovr2 */ <0x04a0a000 0x1000>, /* vp1 */ - <0x04a0b000 0x1000>; /* vp2 */ + <0x04a0b000 0x1000>, /* vp2 */ + <0x04a01000 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>; power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 67 1>,