From patchwork Thu Feb 15 10:30:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: MD Danish Anwar X-Patchwork-Id: 13557908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9C11C4829E for ; Thu, 15 Feb 2024 10:31:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EyBwphHv8KaGlylozupYBfmLd7j8xKh9uP5XN8KUgs0=; b=KlU8RLL+iG/yIW phanpNv2fqJU49sbopjtUJZhEcOKFqGFrw29LpKs8U6zV6fX+FNf/V5zDBHaTCsJvhsS3VgoT4L4y Pb92gog9myPjFHiKCXQDkMi+VKm+jgR5FfkfR3icEA+XyUXGOnJr/cb4uDxwvguI9PgPk0VDNyZ9Z NK+EgI4qbrW9aPfojcHuzTjvdSMUUxpGrHwgOdROsdc+aEpVnzCD9syJMFrtwx77NPak/CRm8rr8P +LWo/pJL4KdCMoRBNcLy3jfiMsXmS0mrUScDvTX65gulzs0AfnywdIwnISl7EnjmiJ/QYvTR30w8y YwOz0ztfynXERrGToOWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1raZ0z-0000000Fkxl-1mUr; Thu, 15 Feb 2024 10:30:49 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1raZ0w-0000000Fkwd-2erd for linux-arm-kernel@lists.infradead.org; Thu, 15 Feb 2024 10:30:48 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41FAUfpt095113; Thu, 15 Feb 2024 04:30:41 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707993041; bh=xUh4OTnhvZ4QilgxMoyStbN6234r5hgOwbudObkOCDE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=D0vwUR8Rm2uES/7J2/lEnjZ/qAkKfrFxsbtM8sWj5NQEGqTLVBzjbUe//cuCeuiCE W4LXTYHJMUwDQWQNf7ZQoONKAAEzjUY81fScQyfng2WIWs1WvWripfpP1S7uwTX2Fr X6oHbmhrTD9/YCrorW7kq0Luz1PA+hBx5jDAq3OY= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41FAUfsx041766 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 04:30:41 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 04:30:40 -0600 Received: from fllvsmtp7.itg.ti.com (10.64.40.31) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 04:30:40 -0600 Received: from fllv0122.itg.ti.com (fllv0122.itg.ti.com [10.247.120.72]) by fllvsmtp7.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41FAUeSI004604; Thu, 15 Feb 2024 04:30:40 -0600 Received: from localhost (danish-tpc.dhcp.ti.com [10.24.69.25]) by fllv0122.itg.ti.com (8.14.7/8.14.7) with ESMTP id 41FAUedS031772; Thu, 15 Feb 2024 04:30:40 -0600 From: MD Danish Anwar To: Vignesh Raghavendra , Nishanth Menon Subject: [PATCH v5 1/3] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Date: Thu, 15 Feb 2024 16:00:34 +0530 Message-ID: <20240215103036.2825096-2-danishanwar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215103036.2825096-1-danishanwar@ti.com> References: <20240215103036.2825096-1-danishanwar@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240215_023046_845410_6F30BC71 X-CRM114-Status: GOOD ( 10.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: srk@ti.com, Andrew Lunn , Conor Dooley , Grygorii Strashko , Tero Kristo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, MD Danish Anwar , r-gunasekaran@ti.com, Roger Quadros , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Suman Anna The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Vignesh Raghavendra Signed-off-by: Grygorii Strashko Signed-off-by: Suman Anna Reviewed-by: Ravi Gunasekaran Reviewed-by: Roger Quadros Signed-off-by: MD Danish Anwar --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index ddd382a0d735..c678366623b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1225,6 +1225,18 @@ icssg0_iepclk_mux: iepclk-mux@30 { }; }; + icssg0_iep0: iep@2e000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2e000 0x1000>; + clocks = <&icssg0_iepclk_mux>; + }; + + icssg0_iep1: iep@2f000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2f000 0x1000>; + clocks = <&icssg0_iepclk_mux>; + }; + icssg0_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; @@ -1366,6 +1378,18 @@ icssg1_iepclk_mux: iepclk-mux@30 { }; }; + icssg1_iep0: iep@2e000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2e000 0x1000>; + clocks = <&icssg1_iepclk_mux>; + }; + + icssg1_iep1: iep@2f000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2f000 0x1000>; + clocks = <&icssg1_iepclk_mux>; + }; + icssg1_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>;