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Tue, 20 Feb 2024 14:57:38 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id q8-20020a2e9688000000b002d24de76dffsm277990lji.100.2024.02.20.14.57.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Feb 2024 14:57:38 -0800 (PST) From: Dmitry Baryshkov Date: Wed, 21 Feb 2024 00:57:36 +0200 Subject: [PATCH RESEND 1/2] ARM: add CLIDR accessor functions MIME-Version: 1.0 Message-Id: <20240221-armv7-cacheinfo-v1-1-69dbd7f20d04@linaro.org> References: <20240221-armv7-cacheinfo-v1-0-69dbd7f20d04@linaro.org> In-Reply-To: <20240221-armv7-cacheinfo-v1-0-69dbd7f20d04@linaro.org> To: Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1067; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=t8WE1+fA8j81+AJkUCcorxLRWwscCfXSF46thI/6wwA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl1S5hrQqywysV90XIPIec3CzG65DMLy1p1IZ+m JFGMLPt8OqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZdUuYQAKCRCLPIo+Aiko 1XyUB/9fcr+ssXTBs0xyFgXSZLdfnWArU07R1WxcaKc4SGofjSH2cU7fgWJwOGtBujY1BR4/vke PATVIYgVKhIeevkl1BYO3nLjBrdCu7imAIvQfHCpSUcXFWg8gQDSbdSYfUmg5Q/BarV2+iVbDtn LgI6C5uwkFcFs4ibvOs2cZkc4O7sDKs0FJMC/EALdDkk4gFsgCBw3ClMxjiIE+/LhN4/Ms2pKPq Jlno4AT2Kas5CQkPzVTfQ1J8lmW68w3prLGHjdxAoKez9nb505CK9gG/9zg8F6Qgw/aomGZfm44 l4DRFDlJRGpqEhTAcZB7j0+nyrsavOxMDJPkBwGybdtAx9s5 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240220_145740_975882_F7AA29CE X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add functions to read the CLIDR, Cache Level ID Register. Signed-off-by: Dmitry Baryshkov --- arch/arm/include/asm/cachetype.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h index e8c30430be33..90203a6d7270 100644 --- a/arch/arm/include/asm/cachetype.h +++ b/arch/arm/include/asm/cachetype.h @@ -81,6 +81,14 @@ static inline unsigned int read_ccsidr(void) asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val)); return val; } + +static inline unsigned int read_clidr(void) +{ + unsigned int val; + + asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (val)); + return val; +} #else /* CONFIG_CPU_V7M */ #include #include "asm/v7m.h" @@ -94,6 +102,11 @@ static inline unsigned int read_ccsidr(void) { return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR); } + +static inline unsigned int read_clidr(void) +{ + return readl(BASEADDR_V7M_SCB + V7M_SCB_CLIDR); +} #endif #endif