diff mbox series

[v2,1/8] drivers/perf: hisi_pcie: Rename hisi_pcie_pmu_{config,clear}_filter()

Message ID 20240223103359.18669-2-yangyicong@huawei.com (mailing list archive)
State New, archived
Headers show
Series drivers/perf: hisi_pcie: Several updates for HiSilicon PCIe PMU driver | expand

Commit Message

Yicong Yang Feb. 23, 2024, 10:33 a.m. UTC
From: Yicong Yang <yangyicong@hisilicon.com>

hisi_pcie_pmu_{config,clear}_filter() are config/clear HISI_PCIE_EVENT_CTRL
register which contains not only the filter but also the event code. The
function names are bit misleading. Rename it to
hisi_pcie_pmu_{config,clear}_event_ctrl() to reflects their functions
more accurately.

Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
 drivers/perf/hisilicon/hisi_pcie_pmu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Jonathan Cameron Feb. 26, 2024, 3:11 p.m. UTC | #1
On Fri, 23 Feb 2024 18:33:52 +0800
Yicong Yang <yangyicong@huawei.com> wrote:

> From: Yicong Yang <yangyicong@hisilicon.com>
> 
> hisi_pcie_pmu_{config,clear}_filter() are config/clear HISI_PCIE_EVENT_CTRL
> register which contains not only the filter but also the event code. The
> function names are bit misleading. Rename it to
> hisi_pcie_pmu_{config,clear}_event_ctrl() to reflects their functions
> more accurately.
> 
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Definitely an improvement on readability.  As discussed offline I'm
not sure the 'clear' part is strictly right either, but in some
sense that's a separate issue.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
>  drivers/perf/hisilicon/hisi_pcie_pmu.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
> index b90ba8aca3fa..9760ddde46fd 100644
> --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
> +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
> @@ -216,7 +216,7 @@ static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset,
>  	writeq_relaxed(val, pcie_pmu->base + offset);
>  }
>  
> -static void hisi_pcie_pmu_config_filter(struct perf_event *event)
> +static void hisi_pcie_pmu_config_event_ctrl(struct perf_event *event)
>  {
>  	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
>  	struct hw_perf_event *hwc = &event->hw;
> @@ -259,7 +259,7 @@ static void hisi_pcie_pmu_config_filter(struct perf_event *event)
>  	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_EVENT_CTRL, hwc->idx, reg);
>  }
>  
> -static void hisi_pcie_pmu_clear_filter(struct perf_event *event)
> +static void hisi_pcie_pmu_clear_event_ctrl(struct perf_event *event)
>  {
>  	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
>  	struct hw_perf_event *hwc = &event->hw;
> @@ -505,7 +505,7 @@ static void hisi_pcie_pmu_start(struct perf_event *event, int flags)
>  	WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
>  	hwc->state = 0;
>  
> -	hisi_pcie_pmu_config_filter(event);
> +	hisi_pcie_pmu_config_event_ctrl(event);
>  	hisi_pcie_pmu_enable_counter(pcie_pmu, hwc);
>  	hisi_pcie_pmu_enable_int(pcie_pmu, hwc);
>  	hisi_pcie_pmu_set_period(event);
> @@ -526,7 +526,7 @@ static void hisi_pcie_pmu_stop(struct perf_event *event, int flags)
>  	hisi_pcie_pmu_event_update(event);
>  	hisi_pcie_pmu_disable_int(pcie_pmu, hwc);
>  	hisi_pcie_pmu_disable_counter(pcie_pmu, hwc);
> -	hisi_pcie_pmu_clear_filter(event);
> +	hisi_pcie_pmu_clear_event_ctrl(event);
>  	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
>  	hwc->state |= PERF_HES_STOPPED;
>
diff mbox series

Patch

diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
index b90ba8aca3fa..9760ddde46fd 100644
--- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
+++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
@@ -216,7 +216,7 @@  static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset,
 	writeq_relaxed(val, pcie_pmu->base + offset);
 }
 
-static void hisi_pcie_pmu_config_filter(struct perf_event *event)
+static void hisi_pcie_pmu_config_event_ctrl(struct perf_event *event)
 {
 	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
 	struct hw_perf_event *hwc = &event->hw;
@@ -259,7 +259,7 @@  static void hisi_pcie_pmu_config_filter(struct perf_event *event)
 	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_EVENT_CTRL, hwc->idx, reg);
 }
 
-static void hisi_pcie_pmu_clear_filter(struct perf_event *event)
+static void hisi_pcie_pmu_clear_event_ctrl(struct perf_event *event)
 {
 	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
 	struct hw_perf_event *hwc = &event->hw;
@@ -505,7 +505,7 @@  static void hisi_pcie_pmu_start(struct perf_event *event, int flags)
 	WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
 	hwc->state = 0;
 
-	hisi_pcie_pmu_config_filter(event);
+	hisi_pcie_pmu_config_event_ctrl(event);
 	hisi_pcie_pmu_enable_counter(pcie_pmu, hwc);
 	hisi_pcie_pmu_enable_int(pcie_pmu, hwc);
 	hisi_pcie_pmu_set_period(event);
@@ -526,7 +526,7 @@  static void hisi_pcie_pmu_stop(struct perf_event *event, int flags)
 	hisi_pcie_pmu_event_update(event);
 	hisi_pcie_pmu_disable_int(pcie_pmu, hwc);
 	hisi_pcie_pmu_disable_counter(pcie_pmu, hwc);
-	hisi_pcie_pmu_clear_filter(event);
+	hisi_pcie_pmu_clear_event_ctrl(event);
 	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
 	hwc->state |= PERF_HES_STOPPED;