From patchwork Tue Feb 27 17:38:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 13574225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7409DC5478C for ; Tue, 27 Feb 2024 17:40:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Q0/lJRPHHH0QMpgfaOb1rC1wyfEV5Z9QJIiGjUDkCzc=; b=toNGwOEWuXupa9 Rg2Nvi9q1SItd0Ub6camKvgXt0ZnnuARhaW3pziIB9B7ZhlIqGIjeA9JH/j+LG32W0JnVKeGpo3GM svYC/ovbX6kbqDpLr5D/JBQ6rT+d7IXKpxsbtrOJcuFlppK6iRNuJJZ55N8qqV4HGMppKjzIxOMJG qqtkta2oqQQ86AqFhFf83qHw6y5vx2zk8KfRkUPqoiXODLZ6OkvMLkN9Hxpr3I5Qqiy4OzyikVAJu TfJG4GhsZ0OFwisBdYt9UbE3adNyO2BPC3tpB7VD672u34fb/N4+mwgPzrTMdMri+hQXwSHOdLB60 3XlFBNnr8YXHPaXOhzTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rf1R6-00000006G8P-1Yx3; Tue, 27 Feb 2024 17:40:12 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rf1Qy-00000006G3D-08BG for linux-arm-kernel@lists.infradead.org; Tue, 27 Feb 2024 17:40:05 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41RBiDrS010569; Tue, 27 Feb 2024 18:39:57 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=5kAJdzvKyNBF4DCTisnMcXkF/FxsQlkKDl8EbRW2k+4=; b=bS +u84A6yTVBC5frrrXDTKtPKuymOYjudO7gJVI7MixQhN0g3bQWy2XSKlA6w3cqpe 4QpVebHBgQhDG2efHU3F3Vs9tknKexjfZse2U/b11Mc3IUkHFGYExfcbvYnrqsow rypD6lnKuT2ik/plvXG5s8W7HOcTWxg5hL8qvv4HB5IU+jdo1qB89Y5+xmx5EcG/ 48RuaSO5TlPA6XMCKuDhfbZSDdHqrK/zJ4hpkncPbzmiX3nx4dNUy+/z4oacKwzN H5gSKDfviAB6Uugwu9yDR0I+v3Tsu7KIA8/zv/e0hQuQ1V+IHyJ+801S9R7OrVsh 3FTYaU5Vb36j2vKvpLfA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3whf4cscdy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Feb 2024 18:39:57 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id CDD8D40044; Tue, 27 Feb 2024 18:39:53 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0F61C2AD131; Tue, 27 Feb 2024 18:39:30 +0100 (CET) Received: from localhost (10.252.26.109) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Tue, 27 Feb 2024 18:39:29 +0100 From: Fabrice Gasnier To: CC: , , , , , , Subject: [PATCH v4 08/11] counter: stm32-timer-cnt: introduce channels Date: Tue, 27 Feb 2024 18:38:00 +0100 Message-ID: <20240227173803.53906-9-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240227173803.53906-1-fabrice.gasnier@foss.st.com> References: <20240227173803.53906-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.26.109] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-27_05,2024-02-27_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240227_094004_388433_CD12EBF8 X-CRM114-Status: GOOD ( 11.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Simply add channels 3 and 4 that can be used for capture. Statically add them, despite some timers doesn't have them. Rather rely on stm32_action_read that will report "none" action for these currently. Reviewed-by: William Breathitt Gray Signed-off-by: Fabrice Gasnier --- Changes in v4: - Add William's Reviewed-by tag Changes in v3: - New patch split from: "counter: stm32-timer-cnt: populate capture channels and check encoder" --- drivers/counter/stm32-timer-cnt.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c index 144e040fa457..66039d1b3642 100644 --- a/drivers/counter/stm32-timer-cnt.c +++ b/drivers/counter/stm32-timer-cnt.c @@ -25,6 +25,8 @@ #define STM32_CH1_SIG 0 #define STM32_CH2_SIG 1 #define STM32_CLOCK_SIG 2 +#define STM32_CH3_SIG 3 +#define STM32_CH4_SIG 4 struct stm32_timer_regs { u32 cr1; @@ -365,6 +367,14 @@ static struct counter_signal stm32_signals[] = { .ext = stm32_count_clock_ext, .num_ext = ARRAY_SIZE(stm32_count_clock_ext), }, + { + .id = STM32_CH3_SIG, + .name = "Channel 3" + }, + { + .id = STM32_CH4_SIG, + .name = "Channel 4" + }, }; static struct counter_synapse stm32_count_synapses[] = { @@ -383,6 +393,16 @@ static struct counter_synapse stm32_count_synapses[] = { .num_actions = ARRAY_SIZE(stm32_clock_synapse_actions), .signal = &stm32_signals[STM32_CLOCK_SIG] }, + { + .actions_list = stm32_synapse_actions, + .num_actions = ARRAY_SIZE(stm32_synapse_actions), + .signal = &stm32_signals[STM32_CH3_SIG] + }, + { + .actions_list = stm32_synapse_actions, + .num_actions = ARRAY_SIZE(stm32_synapse_actions), + .signal = &stm32_signals[STM32_CH4_SIG] + }, }; static struct counter_count stm32_counts = {