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Mon, 11 Mar 2024 02:15:47 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id js23-20020a170906ca9700b00a4617f1ccf3sm1601256ejb.169.2024.03.11.02.15.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Mar 2024 02:15:47 -0700 (PDT) From: Linus Walleij Date: Mon, 11 Mar 2024 10:15:43 +0100 Subject: [PATCH v3 6/9] ARM: turn CPU cache flush functions into static inlines MIME-Version: 1.0 Message-Id: <20240311-arm32-cfi-v3-6-224a0f0a45c2@linaro.org> References: <20240311-arm32-cfi-v3-0-224a0f0a45c2@linaro.org> In-Reply-To: <20240311-arm32-cfi-v3-0-224a0f0a45c2@linaro.org> To: Russell King , Sami Tolvanen , Kees Cook , Nathan Chancellor , Nick Desaulniers , Ard Biesheuvel , Arnd Bergmann Cc: linux-arm-kernel@lists.infradead.org, llvm@lists.linux.dev, Linus Walleij X-Mailer: b4 0.12.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240311_021550_414959_D6235F41 X-CRM114-Status: GOOD ( 16.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The members of the vector table struct cpu_cache_fns cpu_cache are called directly using defines, but this is really confusing for KCFI. Wrap the calls in static inlines and tag them with __nocfi so things start to work. Conversely a similar approach is used for the __glue() helpers which define their way into an assembly ENTRY(symbol) for respective CPU variant. We wrap these into static inlines and prefix them with __nocfi as well. (This happens on !MULTI_CACHE systems.) For this case we also need to invoke the __glue() macro to provide a proper function prototype for the inner function. Signed-off-by: Linus Walleij --- arch/arm/include/asm/cacheflush.h | 45 +++++++++++++++++++++++++++++++-------- arch/arm/mm/dma.h | 28 ++++++++++++++++++------ 2 files changed, 58 insertions(+), 15 deletions(-) diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 1075534b0a2e..76fb665162a4 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -122,14 +122,38 @@ struct cpu_cache_fns { extern struct cpu_cache_fns cpu_cache; -#define __cpuc_flush_icache_all cpu_cache.flush_icache_all -#define __cpuc_flush_kern_all cpu_cache.flush_kern_all -#define __cpuc_flush_kern_louis cpu_cache.flush_kern_louis -#define __cpuc_flush_user_all cpu_cache.flush_user_all -#define __cpuc_flush_user_range cpu_cache.flush_user_range -#define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range -#define __cpuc_coherent_user_range cpu_cache.coherent_user_range -#define __cpuc_flush_dcache_area cpu_cache.flush_kern_dcache_area +static inline void __nocfi __cpuc_flush_icache_all(void) +{ + cpu_cache.flush_icache_all(); +} +static inline void __nocfi __cpuc_flush_kern_all(void) +{ + cpu_cache.flush_icache_all(); +} +static inline void __nocfi __cpuc_flush_kern_louis(void) +{ + cpu_cache.flush_kern_louis(); +} +static inline void __nocfi __cpuc_flush_user_all(void) +{ + cpu_cache.flush_user_all(); +} +static inline void __nocfi __cpuc_flush_user_range(unsigned long start, unsigned long end, unsigned int flags) +{ + cpu_cache.flush_user_range(start, end, flags); +} +static inline void __nocfi __cpuc_coherent_kern_range(unsigned long start, unsigned long end) +{ + cpu_cache.coherent_kern_range(start, end); +} +static inline int __nocfi __cpuc_coherent_user_range(unsigned long start, unsigned long end) +{ + return cpu_cache.coherent_user_range(start, end); +} +static inline void __nocfi __cpuc_flush_dcache_area(void *kaddr, size_t sz) +{ + cpu_cache.flush_kern_dcache_area(kaddr, sz); +} /* * These are private to the dma-mapping API. Do not use directly. @@ -137,7 +161,10 @@ extern struct cpu_cache_fns cpu_cache; * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -#define dmac_flush_range cpu_cache.dma_flush_range +static inline void __nocfi dmac_flush_range(const void *start, const void *end) +{ + cpu_cache.dma_flush_range(start, end); +} #else diff --git a/arch/arm/mm/dma.h b/arch/arm/mm/dma.h index aaef64b7f177..251b8a9fffc1 100644 --- a/arch/arm/mm/dma.h +++ b/arch/arm/mm/dma.h @@ -5,8 +5,6 @@ #include #ifndef MULTI_CACHE -#define dmac_map_area __glue(_CACHE,_dma_map_area) -#define dmac_unmap_area __glue(_CACHE,_dma_unmap_area) /* * These are private to the dma-mapping API. Do not use directly. @@ -14,8 +12,20 @@ * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -extern void dmac_map_area(const void *, size_t, int); -extern void dmac_unmap_area(const void *, size_t, int); + +/* These turn into function declarations for each per-CPU glue function */ +void __glue(_CACHE,_dma_map_area)(const void *, size_t, int); +void __glue(_CACHE,_dma_unmap_area)(const void *, size_t, int); + +static inline void __nocfi dmac_map_area(const void *start, size_t sz, int flags) +{ + __glue(_CACHE,_dma_map_area)(start, sz, flags); +} + +static inline void __nocfi dmac_unmap_area(const void *start, size_t sz, int flags) +{ + __glue(_CACHE,_dma_unmap_area)(start, sz, flags); +} #else @@ -25,8 +35,14 @@ extern void dmac_unmap_area(const void *, size_t, int); * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -#define dmac_map_area cpu_cache.dma_map_area -#define dmac_unmap_area cpu_cache.dma_unmap_area +static inline void __nocfi dmac_map_area(const void *start, size_t sz, int flags) +{ + cpu_cache.dma_map_area(start, sz, flags); +} +static inline void __nocfi dmac_unmap_area(const void *start, size_t sz, int flags) +{ + cpu_cache.dma_unmap_area(start, sz, flags); +} #endif