From patchwork Wed Mar 20 17:37:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Link Mauve X-Patchwork-Id: 13598057 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4D7CC6FD1F for ; Wed, 20 Mar 2024 17:38:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=L7M+LToCzxsnVcnpCwPPASs97AcDib4fHo5t71xbL14=; b=z4974rD+u51APJ mUGLeZyv1Vyc/YOBk+NrdXMCtIf2vdU3Kgz8e/mPLq/L7us+WIiro3xPzP7t6L5Lp5ixl407OLddC c9vkKnLGUYOnBKz0F+/zePioneUjHVUIZeyX7AXkC3/YkYpYa4ow2ZP/MSHjXz7xFlz0wr/rr5DS8 ATCWJ3UiuET10sqXGQ3V/FFfBl0baJBqMJyNtWnqGJJmLHJ9UT9qB0akHP+mzo3apXpvBICrzIeHE M6SGxNaq6mGv6nIYrpvGtdWckArJasBjPD2rQGRi5iGUP8Frr4gZ1TaApBH2sStFUgCIF0tfAlWsY R+ncpnyZOJUhz0rnA8dA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmztB-00000000Vkk-0Pna; Wed, 20 Mar 2024 17:38:09 +0000 Received: from [2a01:e0a:828:c7c0:e2d5:5eff:fe2d:8e8] (helo=luna.linkmauve.fr) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmzst-00000000VcD-0mq6; Wed, 20 Mar 2024 17:37:54 +0000 Received: by luna.linkmauve.fr (Postfix, from userid 1000) id 0437EFDAD1D; Wed, 20 Mar 2024 18:37:45 +0100 (CET) From: Emmanuel Gil Peyrot To: linux-kernel@vger.kernel.org Cc: Emmanuel Gil Peyrot , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Joerg Roedel , Will Deacon , Robin Murphy , Sebastian Reichel , Cristian Ciocaltea , Dragan Simic , Shreeya Patel , Chris Morgan , Andy Yan , Nicolas Frattaroli , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev Subject: [PATCH 4/4] media: verisilicon: Enable VEPU121 on rk3588 Date: Wed, 20 Mar 2024 18:37:33 +0100 Message-ID: <20240320173736.2720778-5-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240320173736.2720778-1-linkmauve@linkmauve.fr> References: <20240320173736.2720778-1-linkmauve@linkmauve.fr> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240320_103751_412675_47A2EE7D X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Only the JPEG encoder is available for now, although there are patches for the undocumented VP8 encoder floating around[0]. This has been tested on a rock-5b, resulting in four /dev/video* encoders. The userspace program I’ve been using to test them is Onix[1], using the jpeg-encoder example, it will pick one of these four at random (but displays the one it picked): % ffmpeg -i -pix_fmt yuvj420p temp.yuv % jpeg-encoder temp.yuv NV12 output.jpeg [0] https://patchwork.kernel.org/project/linux-rockchip/list/?series=789885 [1] https://crates.io/crates/onix Signed-off-by: Emmanuel Gil Peyrot --- drivers/media/platform/verisilicon/hantro_drv.c | 1 + drivers/media/platform/verisilicon/hantro_hw.h | 1 + .../media/platform/verisilicon/rockchip_vpu_hw.c | 13 +++++++++++++ 3 files changed, 15 insertions(+) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 34b123dafd89..8d38dbb5a1eb 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -722,6 +722,7 @@ static const struct of_device_id of_hantro_match[] = { { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, }, { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, }, + { .compatible = "rockchip,rk3588-vepu121", .data = &rk3588_vepu121_variant, }, { .compatible = "rockchip,rk3588-av1-vpu", .data = &rk3588_vpu981_variant, }, #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/media/platform/verisilicon/hantro_hw.h index 7737320cc8cc..340101200be5 100644 --- a/drivers/media/platform/verisilicon/hantro_hw.h +++ b/drivers/media/platform/verisilicon/hantro_hw.h @@ -405,6 +405,7 @@ extern const struct hantro_variant rk3328_vpu_variant; extern const struct hantro_variant rk3399_vpu_variant; extern const struct hantro_variant rk3568_vepu_variant; extern const struct hantro_variant rk3568_vpu_variant; +extern const struct hantro_variant rk3588_vepu121_variant; extern const struct hantro_variant rk3588_vpu981_variant; extern const struct hantro_variant sama5d4_vdec_variant; extern const struct hantro_variant sunxi_vpu_variant; diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c index f97527670783..aad59b8b1fb5 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c @@ -797,6 +797,19 @@ const struct hantro_variant px30_vpu_variant = { .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) }; +const struct hantro_variant rk3588_vepu121_variant = { + .enc_offset = 0x0, + .enc_fmts = rockchip_vpu_enc_fmts, + .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .codec = HANTRO_JPEG_ENCODER, + .codec_ops = rk3568_vepu_codec_ops, + .irqs = rk3568_vepu_irqs, + .num_irqs = ARRAY_SIZE(rk3568_vepu_irqs), + .init = rockchip_vpu_hw_init, + .clk_names = rockchip_vpu_clk_names, + .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) +}; + const struct hantro_variant rk3588_vpu981_variant = { .dec_offset = 0x0, .dec_fmts = rockchip_vpu981_dec_fmts,