From patchwork Mon Mar 25 14:22:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 13602322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 816D0C54E58 for ; Mon, 25 Mar 2024 14:24:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Cc:To:In-Reply-To: References:Message-Id:Subject:Date:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=AS/L0xQDqihe4gz7dbUNc0bF8XIE6icSsz/4Vz69sUQ=; b=Q5lRnWCcGm9GAtaHfd6zE/peFz r5nMYyuahhT0iYDy9roAfOodItb+CPHBy704gUdXZFNqibyPJzCBc19kogruje5f8QQPllwNgN+Sb pLwUmHxXunDTlmh/m19tSAJskCXwngH12YQYmFJAuvjJ5torlGrcr794UVl9/RyeM8u1V14i2PJWL fS/6TK7g72ChjgWy78ovw6dbQnSwfAJIrvN0GoYp8L+Mdu4TA8HlOjjN8lu254OTVviai5UaxEtew xrf2SDPj3KxP4w94pR8D3A3avfcpNFEH0uHEevUTTLnuVg4G9zKHqKe0ysyYp0HlYyu96Lt8YEV2v xfn87xZQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rolEo-00000000CuW-3BXJ; Mon, 25 Mar 2024 14:23:46 +0000 Received: from mail-he1eur01on0705.outbound.protection.outlook.com ([2a01:111:f400:fe1e::705] helo=EUR01-HE1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rolEK-00000000CXz-3xFV; Mon, 25 Mar 2024 14:23:20 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WS+8gtLieMHPx8EeNzaVO2efsuGmxOMyI+4VKlPqvbTieB/lOrIPHF3GVzI1FvbsXeuFj8bbZVKmQ7/EF3nIzk2anKrldZLoN3EQ8Wa/Zl6DwV5rAKRD7siN7teT9x6x3vJLKi2CGF+VmeVNviZj3J5EVHYEJovQd6PaqauTTw146gOz+plLhq180MFXq4MNEhXoXphZgdo/QDDorPojQKc816DHOyQHB98BBrLXvOUSl8rdQmCjdokLRnfaw5Lo3utdCZRehj+nlIen+HGxojnJ298SX8KJMzX8LZe84pUBAMRsMe1OHGjvkGQYuibHMtDgKNrrSHCK7TjdweNBhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=jAbps8oncDARBHdD5xJiRQfPLqDkWGPxLBgvBWO7Vwk=; b=C9TNjVvHobCW4vhgHWFPp2dx3vCQ4K2VrvFYPdC8vOA8JIJ0eY3v1rAZMgrPAOUqkMxYGHmGhAOlxBrPLkrU49JDZlPRVMLDJWx3NhnZI0xS0CjhIm6z8I6vNHBgYkZBQkN+dzdG8S7lGcTcIFdnvylQEDPpnj8lhnnmmH+lULHi2TFGaXT/TJMxD/xBGOGiOaQ6lCVnfYPaiv/6Bf/mBFaFBPOUeEA4KZu7QCKEu7dFtMth3430/Y3Scf6dd8xgeavkIaDy2EotMuLKiVXDbvIZmy054EoVfGRzO1g5S2ttiWC6sXYmok7RiBm4wIqXtg9bMV4Nwb1M/hJ8k8iCxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wolfvision.net; dmarc=pass action=none header.from=wolfvision.net; dkim=pass header.d=wolfvision.net; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wolfvision.net; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jAbps8oncDARBHdD5xJiRQfPLqDkWGPxLBgvBWO7Vwk=; b=QmP3n8l+G99QUGVftfx3Gb5e2HpGbOZn5ukg1TIfiXTBMqAKDrj0LbQ9nLKtNMsiIpaIqMDkuW/tbqMMfLso0q3qgqDWKDAgPNE0K8l/FwGd7pQnHRL/V2aUdAjokd2MF9aBi96f8cpFxuNV29EUH9fsuGD2MK+BHZGaJfDVG8M= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=wolfvision.net; Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by GV1PR08MB7731.eurprd08.prod.outlook.com (2603:10a6:150:52::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7409.24; Mon, 25 Mar 2024 14:22:58 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::e86a:6893:ac7:dad9]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::e86a:6893:ac7:dad9%5]) with mapi id 15.20.7409.026; Mon, 25 Mar 2024 14:22:58 +0000 From: Michael Riesch Date: Mon, 25 Mar 2024 15:22:33 +0100 Subject: [PATCH 3/4] arm64: dts: rockchip: add wolfvision pf5 mainboard Message-Id: <20240325-feature-wolfvision-pf5-v1-3-5725445f792a@wolfvision.net> References: <20240325-feature-wolfvision-pf5-v1-0-5725445f792a@wolfvision.net> In-Reply-To: <20240325-feature-wolfvision-pf5-v1-0-5725445f792a@wolfvision.net> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1711376575; l=13620; i=michael.riesch@wolfvision.net; s=20240305; h=from:subject:message-id; bh=lUbkhNbsay9TZo8mYnLZCVe94hy+LymooW6LliQ+/js=; b=Nr/+NxtoipdQUw8WAEEogOA4jpUAuG64h4AyW0nXeiF+kqNI1R5dHAurf+beo6Tr+8t9ufMjG H0VoyczvzUMCBKt7X4lE9raHre96+5swPhB4qluK0BB6n7w8gdDI46p X-Developer-Key: i=michael.riesch@wolfvision.net; a=ed25519; pk=vXktx+l75RJD3KAojVKL7503UCD9nnGRcgujrB9SRp4= X-ClientProxiedBy: VI1PR06CA0127.eurprd06.prod.outlook.com (2603:10a6:803:a0::20) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|GV1PR08MB7731:EE_ X-MS-Office365-Filtering-Correlation-Id: dc4a707f-3d3c-49bf-27c8-08dc4cd71179 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yN9ETMkkIU7j4uWJ+jE/8iouiQkFs4ZZCxqkNfTLBIHBqy9g8z14c5YiBFAyUKRZv5Nr0uD0jHgKq5eKmlKsf8Cg1KqO0QnR6d1w74y2Q9Hks952FE9ov6PwXa6pg2LMo/GEgZo/8CTl+4rzZwXaJ9fVN1DVHBZpYBk8v1+IEUi+mvx3Ovyr2ikkkneF5pgf/FnldGayxCsK8FLlyolSR1bi9W9P3tZx3ShBlwyCWNjG3nHIUnOZk6dYZC1hjw8FuoqbrmQS01xg1tkZ6H/yzW3CqGwDWT8FEYramrJGmAs3yAkMAePySW47K9e0UT6liQ+pNYND/AB0bmsiKGWNLPCcZDEmCIUUNIZUPUTlrY2jxOTxIUarJrZ1PQBO4T8SpvjekVkAhycFdDtsLQzxnMJkFAl0+/cNUtTzIY2eArzoRWHz3wTEc9Tci2ETP1TnMizmmTYbCrVQ19WpXBcs7gUpfmV1a1n0UkPWHo2inNEpTmu2Y//Yi91ZzOVgPZxHoaYAIFgj7MUkmfHlZxtalAtEzoIFeJ+T9y+H6mMC3/m2utdB5ngvUOV4FdKi84BDp48yrZ5F2wXb0Wj0kmxD3nZOWK0oMXImQhMBUvVIHSIxPxpqaPWFTF6dC/G5txmSmUAMHTA8j4aohazj3qx1BP1Nn/e1lbD9EuX6OekfO/MekOxatfDhPH0ma6+BNdgN5WKejcxaQBKMQQS85DXp8H6/TGve9a9783o5UVPKM38= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DU0PR08MB9155.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(52116005)(1800799015)(376005)(366007)(38350700005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?lcvg6CQ/Q2fFxeqxUmRqqif5vPCH?= =?utf-8?q?4Vn+OFx49gB2xJUiKsgQcrGzqYurPYqq+5J+W2PXvsca2aufYeuiNR8d/WDaHBUTq?= =?utf-8?q?iD3Dk0ehXI2RiPgWJ6ky37c1STg8DnghBQsHHQBWWqPTQBUCw6RWBmjkTMjFoz5CN?= =?utf-8?q?RD2rswgWbId88WqH0yJ9Y7+r9bnF6f1w6ZAvli5vhkLLrI43WtE2vpVy/lQYiv6yL?= =?utf-8?q?YQsJKOCDv0rKxfmEKI7ba9UY+V9IGDPhLXIrpsayc33tpVyaN7oSRDF99Mg+5sK/v?= =?utf-8?q?1tSA9RLd0/YD8cADB9KLGcQhxjHFLu9FMx5ue5gIfH4yeWZyMgLPEOiuvpVVy/KQM?= =?utf-8?q?UGwLxKlSwGqO7hV95Iql/8Ac1IwTwEgcMdiUSu59Xo1X45xuYKbeNVCke868xn/8p?= =?utf-8?q?H6nlVbQofK61Hu82o3D2J96h6m7JV8v465y9mZq42sLXf/a9YJNxj5meFVFZ/w9nz?= =?utf-8?q?OT4mZ3lSflVYpHBZV4/6CPk1SZt/+AnLCJiAGX2dfVcMZVRG7x5GMHfxeADkhuPwP?= =?utf-8?q?zZsaGhEsbRhZnXxPO1xFUDEDkR+XNeoy/ciCbhPKVzQIk+Qr1C7PuUpLoZhNfxczQ?= =?utf-8?q?OxK8+eJNEeSe9Zjl6AidfDHWmvd6MnkcjFF+5NeMng2LT5bBCJVpv2kGxd9dBfFen?= =?utf-8?q?EZX6fxfCx0GZ9JIYQj2bgfwQNVAudBDUX3qdgOOX2s0Bk5Gdxa4TDG4PBBcuRVbRB?= =?utf-8?q?dLMtrbWD6lnay6FyMLf5LqH2nNxgmFc3Z4N4ePTs2NEi/LlpNNUjr46X8jI0V9KLY?= =?utf-8?q?Mc6cVNJfdSiujhXFNFxrSauXXDrfH/Pt3GWHbq23ZEpRkbT864JQXl7QpzVfaEXI8?= =?utf-8?q?4C2F/skidW5XFb92rVyZd9n/kBAMqYcQFCqqqV7hr86NKIYR4t4E/bAJYvTAJ3Dxr?= =?utf-8?q?H23Dx9WJAzvhibF562rw21QgWb0oYs/YHY9gFyT+8xFsxFXsIoizBwndB/+Fbg6CS?= =?utf-8?q?faUlJX0GUQpBcN0FOG/8gZMstNhxRRjQ5+Q1G9yAeNic5EitNyjht4oGmmLgOMh/P?= =?utf-8?q?6PCdnwos6zb7v9RPk+YZFPsiMW4ogzPNZs/OhUOynfRBy7c0JEjbs3gMSIEcmqfqS?= =?utf-8?q?fFt/EPvKCAFKXYQQQodimckh1/VHkuC7X3H1mg/LKi7deEcoEjr2+OBQanGoI6QQn?= =?utf-8?q?n78x9RSeNvt+fXaClp2PWX29qt+rfkctb7B1eB0h6hUqVDJiF6QRwvYvEvW99i/yG?= =?utf-8?q?ZWQnjbmBz/bbIgXbAxZ3lTcaBoEoLystELcw72FfU+Gi6KFlsBvTtf96vQdrirPqo?= =?utf-8?q?97N7b1yLB3/FDXzdMu9Rk0PkWiBQS05yDc2Nnp7P9KkfUSMglsOZMQFo+/wQP0gMX?= =?utf-8?q?rulNjfobdiU6KBCr4/eUF5ihIw2YhhQ521m5VOlCBV1BNiCrbscBAthbICLtdyaKj?= =?utf-8?q?srYmSNZ8pVnaHslfOfpVaOS648HltM5IHOMjG3w/dd+tnGsN7IQtjTn1gl29jBHQL?= =?utf-8?q?NjQG7/L6Ih5hZNYA7yj8Q2Hk/zAtb7VIG8znC+ZAifb1PRro4s5En35XwVx3xb7JM?= =?utf-8?q?cePZY3jEqIXaH25u0PCbdNVqRjiBxnxy+w=3D=3D?= X-OriginatorOrg: wolfvision.net X-MS-Exchange-CrossTenant-Network-Message-Id: dc4a707f-3d3c-49bf-27c8-08dc4cd71179 X-MS-Exchange-CrossTenant-AuthSource: DU0PR08MB9155.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2024 14:22:57.5442 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: e94ec9da-9183-471e-83b3-51baa8eb804f X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: FDHjvBWiLlLQXjTOT6AqWh6VcV7gFxVtuEphVdVZEa8I9mXgSWDPOfJ2uEOammDzLAYSbqQyx06ngY2gxfr+ibI0cL7Vn5r1a4WU4tGpHG4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB7731 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240325_072317_108061_30DAB759 X-CRM114-Status: GOOD ( 13.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device tree for the WolfVision PF5 mainboard. It features - Rockchip RK3568 SoC - eMMC - RTC with backup battery - on-board PDM microphone - 12V DC jack - HDMI output - USB-C device port as well as various expansion headers for different extension boards. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-wolfvision-pf5.dts | 528 +++++++++++++++++++++ 2 files changed, 529 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index f906a868b71a..8fb35a363e4f 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -107,6 +107,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts new file mode 100644 index 000000000000..a814749eaa97 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts @@ -0,0 +1,528 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device tree for the WolfVision PF5 mainboard. + * + * Copyright (C) 2024 WolfVision GmbH. + */ + +/dts-v1/; +#include +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model = "WolfVision PF5"; + compatible = "wolfvision,rk3568-pf5", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdhci; + rtc0 = &pcf85623; + rtc1 = &rk809; + }; + + chosen: chosen { + stdout-path = "serial2:115200n8"; + }; + + hdmi_tx: hdmi-tx-connector { + compatible = "hdmi-connector"; + hdmi-pwr-supply = <&hdmi_tx_5v>; + type = "a"; + + port { + hdmi_tx_in: endpoint { + remote-endpoint = <&hdmi_tx_out>; + }; + }; + }; + + hdmi_tx_5v: hdmi-tx-5v-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_tx_5v_en>; + regulator-name = "hdmi_tx_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v_in>; + }; + + pdm_codec: pdm-codec { + compatible = "dmic-codec"; + num-channels = <1>; + #sound-dai-cells = <0>; + }; + + pdm_sound: pdm-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "microphone"; + + simple-audio-card,cpu { + sound-dai = <&pdm>; + }; + + simple-audio-card,codec { + sound-dai = <&pdm_codec>; + }; + }; + + vcc12v_in: vcc12v-in-regulator { + compatible = "regulator-fixed"; + regulator-name = "12v_in"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc12v_cam: vcc12v-cam-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc12v_cam_en>; + regulator-name = "12v_cam"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + vin-supply = <&vcc12v_in>; + }; + + vcc5v_in: vcc5v-in-regulator { + compatible = "regulator-fixed"; + regulator-name = "5v_in"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_in>; + }; + + vcc3v8_cam: vcc3v8-cam-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v8_cam_en>; + regulator-name = "3v8_cam"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + vin-supply = <&vcc5v_in>; + }; + + vcc3v3_sys: vcc3v3-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v_in>; + }; +}; + +&combphy0 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vcc0v9_cpu>; +}; + +&cpu1 { + cpu-supply = <&vcc0v9_cpu>; +}; + +&cpu2 { + cpu-supply = <&vcc0v9_cpu>; +}; + +&cpu3 { + cpu-supply = <&vcc0v9_cpu>; +}; + +&gpu { + mali-supply = <&vcc0v9_gpu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vcc0v9a_image>; + avdd-1v8-supply = <&vcc1v8a_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_tx_out: endpoint { + remote-endpoint = <&hdmi_tx_in>; + }; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + #clock-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + vcc1-supply = <&vcc5v_in>; + vcc2-supply = <&vcc5v_in>; + vcc3-supply = <&vcc5v_in>; + vcc4-supply = <&vcc5v_in>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc5v_in>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vcc0v9_logic: DCDC_REG1 { + regulator-name = "0v9_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc0v9_gpu: DCDC_REG2 { + regulator-name = "0v9_gpu"; + regulator-always-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v1_ddr4: DCDC_REG3 { + regulator-name = "1v1_ddr4"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc0v9_npu: DCDC_REG4 { + regulator-name = "0v9_npu"; + regulator-always-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8: DCDC_REG5 { + regulator-name = "1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc0v9a_image: LDO_REG1 { + regulator-name = "0v9a_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc0v9a: LDO_REG2 { + regulator-name = "0v9a"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc0v9a_pmu: LDO_REG3 { + regulator-name = "0v9a_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vcc3v3_acodec: LDO_REG4 { + regulator-name = "3v3_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: LDO_REG5 { + regulator-name = "3v3_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc1v8a: LDO_REG7 { + regulator-name = "1v8a"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8a_pmu: LDO_REG8 { + regulator-name = "1v8a_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8a_image: LDO_REG9 { + regulator-name = "1v8a_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sw: SWITCH_REG1 { + regulator-name = "3v3_sw"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + regulator@42 { + compatible = "ti,tps62869"; + reg = <0x42>; + + regulators { + vcc0v9_cpu: SW { + regulator-name = "0v9_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = ; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1150000>; + vin-supply = <&vcc5v_in>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + pcf85623: rtc@51 { + compatible = "nxp,pcf85263"; + reg = <0x51>; + pinctrl-names = "default"; + pinctrl-0 = <&clk32k_in>; + quartz-load-femtofarads = <12500>; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m0_xfer>; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; +}; + +&pdm { + pinctrl-0 = <&pdmm0_clk + &pdmm0_sdi0>; + status = "okay"; +}; + +&pinctrl { + cam { + vcc12v_cam_en: vcc12v-cam-en-pinctrl { + rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc3v8_cam_en: vcc3v8-cam-en-pinctrl { + rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmitx { + hdmi_tx_5v_en: hdmi-tx-5v-en-pinctrl { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l-pinctrl { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vcc3v3_acodec>; + vccio2-supply = <&vcc1v8>; + vccio3-supply = <&vcc3v3_sd>; + vccio4-supply = <&vcc1v8>; + vccio5-supply = <&vcc1v8>; + vccio6-supply = <&vcc3v3_sw>; + vccio7-supply = <&vcc3v3_sw>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc1v8a>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + vmmc-supply = <&vcc3v3_sw>; + vqmmc-supply = <&vcc1v8>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "peripheral"; + /* The following quirks are required since the bInterval is 1 and we + * handle steady ISOC streaming. See Usecase 3 in commit 729dcffd1ed3 + * ("usb: dwc3: gadget: Add support for disabling U1 and U2 entries"). + */ + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + /* + * Without this quirk the available fifosize seems to be miscalculated + * in cases where many endpoints are used. In one particular situation + * 8 IN EPs and 3 OUT EPs where selected and lead to stalled transfers + * without the resize quirk. + */ + tx-fifo-resize; + + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP2>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +};