From patchwork Tue Mar 26 03:37:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaoqin Huang X-Patchwork-Id: 13603489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99A8BC54E67 for ; Tue, 26 Mar 2024 03:37:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QNW76drBCS+s86IOnU/gXz7wxxwdtwTt5gFKBPO91GA=; b=3m5kZQbuHtQdvW 5Zd00AiKdvdCB3LM2+0c3oWiMeEOM0sNvSuU+GW73csybhAnnWQQoK4GEAzqtHGlzmD+ZD3ze4tBf m9bHFlj6DGGzFaJya8vwJOzJ6WvgTW/ZavCEEqNIn4c9C6985ixtQitQ8Nsefw6R+/Eg/o2OX8O1R E1NPJ5pzM7od6AyAJxhcUrXwuLItnGY+5Cs5joZek5yKM7DCkKG1NWe/okKlfYbInpefSMun0gxtv NFw2N/rwXkvX+r4QJ8QEmzYIMwVFdUZrQ/h/5xB5bsIG+RzE2k0dUaXo8AaaiLcbI2TXKnEUpzsFA jhQ7aDxyqZaTsUrna0lQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1roxcu-00000002vrK-0c3u; Tue, 26 Mar 2024 03:37:28 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1roxcn-00000002vmw-0n9D for linux-arm-kernel@lists.infradead.org; Tue, 26 Mar 2024 03:37:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1711424240; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/413vgCIo4tY4AG/EofneQ8k0lFab0llDRaNoZ8V/xw=; b=Q4iFM5aCs5YxBEnLA91ZQhfEBaFmxeHaodEphDku+DAVgGCaZSro94c7VO8Cc7cgJVV4/4 xxC+GBFCZ1Xs9wYWiOA/k4RyZkzUPQJBY+lcDlVlRxyCGAoxtA+XM8QGQfXBDZhnK0fZLk xvyA2yNSSnZ2eEorf0bDq2WkJiU4giU= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-426-jZf4tpj1MhWjtdHyk7ToYg-1; Mon, 25 Mar 2024 23:37:15 -0400 X-MC-Unique: jZf4tpj1MhWjtdHyk7ToYg-1 Received: from smtp.corp.redhat.com (int-mx10.intmail.prod.int.rdu2.redhat.com [10.11.54.10]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 3146B85A58B; Tue, 26 Mar 2024 03:37:15 +0000 (UTC) Received: from virt-mtcollins-01.lab.eng.rdu2.redhat.com (virt-mtcollins-01.lab.eng.rdu2.redhat.com [10.8.1.196]) by smtp.corp.redhat.com (Postfix) with ESMTP id 236EC492BC4; Tue, 26 Mar 2024 03:37:15 +0000 (UTC) From: Shaoqin Huang To: Oliver Upton , Marc Zyngier , kvmarm@lists.linux.dev Cc: Shaoqin Huang , Paolo Bonzini , Shuah Khan , James Morse , Suzuki K Poulose , Zenghui Yu , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 2/3] KVM: selftests: aarch64: Introduce pmu_event_filter_test Date: Mon, 25 Mar 2024 23:37:01 -0400 Message-Id: <20240326033706.117189-3-shahuang@redhat.com> In-Reply-To: <20240326033706.117189-1-shahuang@redhat.com> References: <20240326033706.117189-1-shahuang@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.10 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240325_203721_421270_5B3F99A8 X-CRM114-Status: GOOD ( 24.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce pmu_event_filter_test for arm64 platforms. The test configures PMUv3 for a vCPU, and sets different pmu event filters for the vCPU, and check if the guest can see those events which user allow and can't use those events which use deny. This test refactor the create_vpmu_vm() and make it a wrapper for __create_vpmu_vm(), which allows some extra init code before KVM_ARM_VCPU_PMU_V3_INIT. And this test use the KVM_ARM_VCPU_PMU_V3_FILTER attribute to set the pmu event filter in KVM. And choose to filter two common event branches_retired and instructions_retired, and let the guest to check if it see the right pmceid register. Signed-off-by: Shaoqin Huang --- tools/testing/selftests/kvm/Makefile | 1 + .../kvm/aarch64/pmu_event_filter_test.c | 298 ++++++++++++++++++ 2 files changed, 299 insertions(+) create mode 100644 tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 741c7dc16afc..9745be534df3 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -151,6 +151,7 @@ TEST_GEN_PROGS_aarch64 += aarch64/aarch32_id_regs TEST_GEN_PROGS_aarch64 += aarch64/debug-exceptions TEST_GEN_PROGS_aarch64 += aarch64/hypercalls TEST_GEN_PROGS_aarch64 += aarch64/page_fault_test +TEST_GEN_PROGS_aarch64 += aarch64/pmu_event_filter_test TEST_GEN_PROGS_aarch64 += aarch64/psci_test TEST_GEN_PROGS_aarch64 += aarch64/set_id_regs TEST_GEN_PROGS_aarch64 += aarch64/smccc_filter diff --git a/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c new file mode 100644 index 000000000000..972384e81067 --- /dev/null +++ b/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c @@ -0,0 +1,298 @@ + +// SPDX-License-Identifier: GPL-2.0 +/* + * pmu_event_filter_test - Test user limit pmu event for guest. + * + * Copyright (c) 2023 Red Hat, Inc. + * + * This test checks if the guest only see the limited pmu event that userspace + * sets, if the guest can use those events which user allow, and if the guest + * can't use those events which user deny. + * This test runs only when KVM_CAP_ARM_PMU_V3, KVM_ARM_VCPU_PMU_V3_FILTER + * is supported on the host. + */ +#include +#include +#include +#include +#include +#include + +struct pmu_common_event_ids { + uint64_t pmceid0; + uint64_t pmceid1; +} max_pmce, expected_pmce; + +struct vpmu_vm { + struct kvm_vm *vm; + struct kvm_vcpu *vcpu; + int gic_fd; +}; + +static struct vpmu_vm vpmu_vm; + +#define FILTER_NR 10 + +struct test_desc { + const char *name; + struct kvm_pmu_event_filter filter[FILTER_NR]; +}; + +#define __DEFINE_FILTER(base, num, act) \ + ((struct kvm_pmu_event_filter) { \ + .base_event = base, \ + .nevents = num, \ + .action = act, \ + }) + +#define DEFINE_FILTER(base, act) __DEFINE_FILTER(base, 1, act) + +static void guest_code(void) +{ + uint64_t pmceid0 = read_sysreg(pmceid0_el0); + uint64_t pmceid1 = read_sysreg(pmceid1_el0); + + GUEST_ASSERT_EQ(expected_pmce.pmceid0, pmceid0); + GUEST_ASSERT_EQ(expected_pmce.pmceid1, pmceid1); + + GUEST_DONE(); +} + +static void guest_get_pmceid(void) +{ + max_pmce.pmceid0 = read_sysreg(pmceid0_el0); + max_pmce.pmceid1 = read_sysreg(pmceid1_el0); + + GUEST_DONE(); +} + +static void run_vcpu(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + while (1) { + vcpu_run(vcpu); + switch (get_ucall(vcpu, &uc)) { + case UCALL_DONE: + return; + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + default: + TEST_FAIL("Unknown ucall %lu", uc.cmd); + } + } +} + +static void set_pmce(struct pmu_common_event_ids *pmce, int action, int event) +{ + int base = 0; + uint64_t *pmceid = NULL; + + if (event >= 0x4000) { + event -= 0x4000; + base = 32; + } + + if (event >= 0 && event <= 0x1F) { + pmceid = &pmce->pmceid0; + } else if (event >= 0x20 && event <= 0x3F) { + event -= 0x20; + pmceid = &pmce->pmceid1; + } else { + return; + } + + event += base; + if (action == KVM_PMU_EVENT_ALLOW) + *pmceid |= BIT(event); + else + *pmceid &= ~BIT(event); +} + +static void prepare_expected_pmce(struct kvm_pmu_event_filter *filter) +{ + struct pmu_common_event_ids pmce_mask = { ~0, ~0 }; + bool first_filter = true; + int i; + + while (filter && filter->nevents != 0) { + if (first_filter) { + if (filter->action == KVM_PMU_EVENT_ALLOW) + memset(&pmce_mask, 0, sizeof(pmce_mask)); + first_filter = false; + } + + for (i = 0; i < filter->nevents; i++) + set_pmce(&pmce_mask, filter->action, + filter->base_event + i); + + filter++; + } + + expected_pmce.pmceid0 = max_pmce.pmceid0 & pmce_mask.pmceid0; + expected_pmce.pmceid1 = max_pmce.pmceid1 & pmce_mask.pmceid1; +} + +static void pmu_event_filter_init(struct kvm_pmu_event_filter *filter) +{ + while (filter && filter->nevents != 0) { + kvm_device_attr_set(vpmu_vm.vcpu->fd, + KVM_ARM_VCPU_PMU_V3_CTRL, + KVM_ARM_VCPU_PMU_V3_FILTER, + filter); + filter++; + } +} + +#define GICD_BASE_GPA 0x8000000ULL +#define GICR_BASE_GPA 0x80A0000ULL + +/* Create a VM that has one vCPU with PMUv3 configured. */ +static void create_vpmu_vm_with_filter(void *guest_code, + struct kvm_pmu_event_filter *filter) +{ + uint64_t irq = 23; + + /* The test creates the vpmu_vm multiple times. Ensure a clean state */ + memset(&vpmu_vm, 0, sizeof(vpmu_vm)); + + vpmu_vm.vm = vm_create(1); + vpmu_vm.vcpu = vm_vcpu_add_with_vpmu(vpmu_vm.vm, 0, guest_code); + vpmu_vm.gic_fd = vgic_v3_setup(vpmu_vm.vm, 1, 64, + GICD_BASE_GPA, GICR_BASE_GPA); + __TEST_REQUIRE(vpmu_vm.gic_fd >= 0, + "Failed to create vgic-v3, skipping"); + + pmu_event_filter_init(filter); + + /* Initialize vPMU */ + vpmu_set_irq(vpmu_vm.vcpu, irq); + vpmu_init(vpmu_vm.vcpu); +} + +static void create_vpmu_vm(void *guest_code) +{ + create_vpmu_vm_with_filter(guest_code, NULL); +} + +static void destroy_vpmu_vm(void) +{ + close(vpmu_vm.gic_fd); + kvm_vm_free(vpmu_vm.vm); +} + +static void run_test(struct test_desc *t) +{ + pr_info("Test: %s\n", t->name); + + create_vpmu_vm_with_filter(guest_code, t->filter); + prepare_expected_pmce(t->filter); + sync_global_to_guest(vpmu_vm.vm, expected_pmce); + + run_vcpu(vpmu_vm.vcpu); + + destroy_vpmu_vm(); +} + +static struct test_desc tests[] = { + { + .name = "without_filter", + .filter = { + { 0 } + }, + }, + { + .name = "member_allow_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 0), + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_INST_RETIRED, 0), + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_BR_RETIRED, 0), + { 0 }, + }, + }, + { + .name = "member_deny_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 1), + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_INST_RETIRED, 1), + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_BR_RETIRED, 1), + { 0 }, + }, + }, + { + .name = "not_member_deny_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 1), + { 0 }, + }, + }, + { + .name = "not_member_allow_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 0), + { 0 }, + }, + }, + { + .name = "deny_chain_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CHAIN, 1), + { 0 }, + }, + }, + { + .name = "deny_cpu_cycles_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 1), + { 0 }, + }, + }, + { + .name = "cancel_filter", + .filter = { + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 0), + DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 1), + }, + }, + { + .name = "multiple_filter", + .filter = { + __DEFINE_FILTER(0x0, 0x10, 0), + __DEFINE_FILTER(0x6, 0x3, 1), + }, + }, + { 0 } +}; + +static void run_tests(void) +{ + struct test_desc *t; + + for (t = &tests[0]; t->name; t++) + run_test(t); +} + +static bool kvm_pmu_support_events(void) +{ + create_vpmu_vm(guest_get_pmceid); + + memset(&max_pmce, 0, sizeof(max_pmce)); + sync_global_to_guest(vpmu_vm.vm, max_pmce); + run_vcpu(vpmu_vm.vcpu); + sync_global_from_guest(vpmu_vm.vm, max_pmce); + destroy_vpmu_vm(); + + return max_pmce.pmceid0 & + (ARMV8_PMUV3_PERFCTR_BR_RETIRED | + ARMV8_PMUV3_PERFCTR_INST_RETIRED | + ARMV8_PMUV3_PERFCTR_CHAIN); +} + +int main(void) +{ + TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_PMU_V3)); + TEST_REQUIRE(kvm_pmu_support_events()); + + run_tests(); +}