From patchwork Tue Mar 26 18:07:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13604825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8FF58CD1284 for ; Tue, 26 Mar 2024 18:11:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TnqONOxYBp8QiZSkoLreA+8YcYMt4V1w/9sg5yzKhy0=; b=kce13zpPMI0NqK iddYCG9HCCUbhAbl7XyGCxQSzSWVNm/W/mwVNxkoY1jRo4XN+2HMq16NlAzYeNKRDCf0iYSImvJCY VuVB01y76JIJL6Uw6PmUr+Jy9drh5ZjmnP+y8kIncbs3MMAxf3QvLkhNdJyfPAiRDKpAOCf377kfS 3evhXFsgNmVDNYgEYzfBrE+snxprbCs+Dv45qTYZ34ta46UwRRKCiKkHvVO+REv0maMMxvd+Nkqfp e1Hbo9dN8DAkzF5YAtIV+clL1Xy3H/kf9X27bgGLXegDoPFBb/POjIIDoOeVd1hfIsqWZHkXoinTP hzZP2F+hmCLNAc40weoA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpBGC-00000005sYE-0XiM; Tue, 26 Mar 2024 18:10:56 +0000 Received: from mgamail.intel.com ([192.198.163.12]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpBG0-00000005sRD-1Bkc for linux-arm-kernel@lists.infradead.org; Tue, 26 Mar 2024 18:10:45 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711476644; x=1743012644; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lzLjtivrQxAS+WqTg89dinGS46hcsyGbp0QSkCiy2Ns=; b=OxBwNYG2fPoCK1M1b8CYlM5d8TPCrvzEHxv1GjszkxJbnA+/83vk4rL3 4W7Sob/wh4OV0viBvXFRDbJ6K3A1wu9vjZM2xnQasnIUGp4Z7L0iE8Gm0 OW0tvRd62lRD1MjFtUftx+fr4uwBa4JK0o+kv7KaWlDa+5uj7t8QuLdtN oX22l5brrG5S2J2cxBh2IaLBhqelNC/LXwSI6kz/3gIOC9a8oc1qS+IeK BCyt2cxvMtqdAiKFtcMynSbVCCrfSNefu1yoxqC/iYws/lh62iokiu4lR uI9i1DdcDll9euuVGTL3Hre6j2L+RBbJQgMDQ4H5l6o3eumK4e8Y1ewI2 g==; X-CSE-ConnectionGUID: +WZLWuvUQXmhjrYLQcYxeg== X-CSE-MsgGUID: ECXqPJLbQOubT3zlwrfcNg== X-IronPort-AV: E=McAfee;i="6600,9927,11025"; a="10325700" X-IronPort-AV: E=Sophos;i="6.07,156,1708416000"; d="scan'208";a="10325700" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2024 11:10:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,11025"; a="937072940" X-IronPort-AV: E=Sophos;i="6.07,156,1708416000"; d="scan'208";a="937072940" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 26 Mar 2024 11:10:38 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1A1D25A8; Tue, 26 Mar 2024 20:10:35 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Russell King Subject: [PATCH v1 06/10] spi: pxa2xx: Allow number of chip select pins to be read from property Date: Tue, 26 Mar 2024 20:07:56 +0200 Message-ID: <20240326181027.1418989-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240326181027.1418989-1-andriy.shevchenko@linux.intel.com> References: <20240326181027.1418989-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240326_111044_375007_86578C17 X-CRM114-Status: GOOD ( 13.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In some cases the number of the chip select pins might come from the device property. Allow driver to use it. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-pxa2xx.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index b01a18c89b6b..f4435c39d096 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1358,6 +1358,7 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) struct ssp_device *ssp = NULL; const void *match; bool is_lpss_priv; + u32 num_cs = 1; int status; is_lpss_priv = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpss_priv"); @@ -1394,8 +1395,11 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) pdata->dma_filter = pxa2xx_spi_idma_filter; } + /* Read number of chip select pins, if provided */ + device_property_read_u32(dev, "num-cs", &num_cs); + + pdata->num_chipselect = num_cs; pdata->is_target = device_property_read_bool(dev, "spi-slave"); - pdata->num_chipselect = 1; pdata->enable_dma = true; pdata->dma_burst_size = 1;