From patchwork Wed Mar 27 19:29:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13607351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC975C47DD9 for ; Wed, 27 Mar 2024 19:32:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TnqONOxYBp8QiZSkoLreA+8YcYMt4V1w/9sg5yzKhy0=; b=OHbmnXOvg/DObp Ob3AElMCPxsRUcIroDr2Qt++BvjPBGe8gKA1EDZt5x5XFECjFu5eYjOG/9drhIyxWvK/1yBrKYSNH yobdb5uqxV6oDL06296TTzw8sTFPI3nKtH3qX1LtUHJ6CncYs/mtm9wEQ1CKMwPBn/rr/Sfkx3CA8 quXOZwlulLZugENt60MzbIrSW+hFrmoEq4L5QeUQHgqs1g7ismB0TTqJMqrF+Ajg4tlezWpWFDRSr +ZdMaBC/TR9QKSoU2f7zuWvcq550nsQkqmNamzoLwVXZQpyUCuxQ0MJcIvt10VXEYBLTE5ekeFeOW TCvKKyAo5WOrvU9LAlRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpZ0C-0000000Anxg-3JDI; Wed, 27 Mar 2024 19:32:00 +0000 Received: from mgamail.intel.com ([192.198.163.8]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpZ04-0000000Ant0-2Bw6 for linux-arm-kernel@lists.infradead.org; Wed, 27 Mar 2024 19:31:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711567911; x=1743103911; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lzLjtivrQxAS+WqTg89dinGS46hcsyGbp0QSkCiy2Ns=; b=AyPdyXlTLnKPOBGSoGxkwyvuzYWgJIfpSLWkrNGI7X2ofbEl8yKDibdr PjHunm16pxB7AVQyVINvSwDQ2jGaRHbbEGkznJSBkNCtIZ17YRHytQut4 8eDMYwyK9hwOMRUDm8LGvIvFOUGgKkQ1huvGuL09U6gbr7hWr28PVCmav mOvpypQ6bUXFBnKkE8S8iTSeY7aBDSUf0LesCpAUGoetsm8tOOSWdlRBv aDFB+PZ6eMpnUXFpxDnKVuJFv8yAVyI6SS2g2ZGZDxGOrcBo1bVnodGt1 4vjQ2zv+UK0N06uYif27cEy7Ye7+1zJV+09dLcZNVRKw8wkwPxOVi0lYV g==; X-CSE-ConnectionGUID: +O5XeOiTRCyZTQKsnnP4Eg== X-CSE-MsgGUID: +i/NyDErQFixEt9uxpgs8g== X-IronPort-AV: E=McAfee;i="6600,9927,11026"; a="24187332" X-IronPort-AV: E=Sophos;i="6.07,159,1708416000"; d="scan'208";a="24187332" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2024 12:31:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,11026"; a="937075028" X-IronPort-AV: E=Sophos;i="6.07,159,1708416000"; d="scan'208";a="937075028" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 27 Mar 2024 12:31:46 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C04E2643; Wed, 27 Mar 2024 21:31:42 +0200 (EET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Russell King Subject: [PATCH v2 5/9] spi: pxa2xx: Allow number of chip select pins to be read from property Date: Wed, 27 Mar 2024 21:29:24 +0200 Message-ID: <20240327193138.2385910-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240327193138.2385910-1-andriy.shevchenko@linux.intel.com> References: <20240327193138.2385910-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240327_123152_818829_40149B3D X-CRM114-Status: GOOD ( 13.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In some cases the number of the chip select pins might come from the device property. Allow driver to use it. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-pxa2xx.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index b01a18c89b6b..f4435c39d096 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1358,6 +1358,7 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) struct ssp_device *ssp = NULL; const void *match; bool is_lpss_priv; + u32 num_cs = 1; int status; is_lpss_priv = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpss_priv"); @@ -1394,8 +1395,11 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) pdata->dma_filter = pxa2xx_spi_idma_filter; } + /* Read number of chip select pins, if provided */ + device_property_read_u32(dev, "num-cs", &num_cs); + + pdata->num_chipselect = num_cs; pdata->is_target = device_property_read_bool(dev, "spi-slave"); - pdata->num_chipselect = 1; pdata->enable_dma = true; pdata->dma_burst_size = 1;