| Message ID | 20240329053130.2822129-6-c-vankar@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add CPSW2G and CPSW9G nodes for J784S4 | expand |
On 29/03/2024 06:31, Chintan Vankar wrote: > From: Siddharth Vadapalli <s-vadapalli@ti.com> > > The CPSW9G instance of the CPSW Ethernet Switch supports USXGMII mode > with MAC Ports 1 and 2 of the instance, which are connected to ENET > Expansion 1 and ENET Expansion 2 slots on the EVM respectively, through > the Serdes2 instance of the SERDES. > > Enable CPSW9G MAC Ports 1 and 2 in fixed-link configuration USXGMII mode > at 5 Gbps each. > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> > Signed-off-by: Chintan Vankar <c-vankar@ti.com> > --- > > Link to v5: > https://lore.kernel.org/r/20240314072129.1520475-6-c-vankar@ti.com/ > > Changes from v5 to v6: > - Updated order of properties in Device Nodes based on > https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node > > arch/arm64/boot/dts/ti/Makefile | 6 +- > .../ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso | 81 +++++++++++++++++++ > 2 files changed, 86 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index f8e47278df43..2d798ef415e4 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo > +dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo > > # Build time test only, enabled by CONFIG_OF_ALL_DTBS > k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \ > @@ -148,6 +149,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ > k3-j721s2-evm-pcie1-ep.dtbo > k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \ > k3-j784s4-evm-quad-port-eth-exp1.dtbo > +k3-j784s4-evm-usxgmii-exp1-exp2.dtbs := k3-j784s4-evm.dtb \ > + k3-j784s4-evm-usxgmii-exp1-exp2.dtbo\ I have doubts this commit was ever built. It clearly fails, just like now linux-next fails. Best regards, Krzysztof
On 29/04/24 16:01, Krzysztof Kozlowski wrote: > On 29/03/2024 06:31, Chintan Vankar wrote: >> From: Siddharth Vadapalli <s-vadapalli@ti.com> >> >> The CPSW9G instance of the CPSW Ethernet Switch supports USXGMII mode >> with MAC Ports 1 and 2 of the instance, which are connected to ENET >> Expansion 1 and ENET Expansion 2 slots on the EVM respectively, through >> the Serdes2 instance of the SERDES. >> >> Enable CPSW9G MAC Ports 1 and 2 in fixed-link configuration USXGMII mode >> at 5 Gbps each. >> >> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> >> Signed-off-by: Chintan Vankar <c-vankar@ti.com> >> --- >> >> Link to v5: >> https://lore.kernel.org/r/20240314072129.1520475-6-c-vankar@ti.com/ >> >> Changes from v5 to v6: >> - Updated order of properties in Device Nodes based on >> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node >> >> arch/arm64/boot/dts/ti/Makefile | 6 +- >> .../ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso | 81 +++++++++++++++++++ >> 2 files changed, 86 insertions(+), 1 deletion(-) >> create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso >> >> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >> index f8e47278df43..2d798ef415e4 100644 >> --- a/arch/arm64/boot/dts/ti/Makefile >> +++ b/arch/arm64/boot/dts/ti/Makefile >> @@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo >> +dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo >> >> # Build time test only, enabled by CONFIG_OF_ALL_DTBS >> k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \ >> @@ -148,6 +149,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ >> k3-j721s2-evm-pcie1-ep.dtbo >> k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \ >> k3-j784s4-evm-quad-port-eth-exp1.dtbo >> +k3-j784s4-evm-usxgmii-exp1-exp2.dtbs := k3-j784s4-evm.dtb \ >> + k3-j784s4-evm-usxgmii-exp1-exp2.dtbo\ > > I have doubts this commit was ever built. It clearly fails, just like > now linux-next fails. > Apologies for the syntax error here, I will fix it and post next version. > Best regards, > Krzysztof >
On 17:16-20240429, Chintan Vankar wrote: > > > On 29/04/24 16:01, Krzysztof Kozlowski wrote: > > On 29/03/2024 06:31, Chintan Vankar wrote: > > > From: Siddharth Vadapalli <s-vadapalli@ti.com> > > > > > > The CPSW9G instance of the CPSW Ethernet Switch supports USXGMII mode > > > with MAC Ports 1 and 2 of the instance, which are connected to ENET > > > Expansion 1 and ENET Expansion 2 slots on the EVM respectively, through > > > the Serdes2 instance of the SERDES. > > > > > > Enable CPSW9G MAC Ports 1 and 2 in fixed-link configuration USXGMII mode > > > at 5 Gbps each. > > > > > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> > > > Signed-off-by: Chintan Vankar <c-vankar@ti.com> > > > --- > > > > > > Link to v5: > > > https://lore.kernel.org/r/20240314072129.1520475-6-c-vankar@ti.com/ > > > > > > Changes from v5 to v6: > > > - Updated order of properties in Device Nodes based on > > > https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node > > > > > > arch/arm64/boot/dts/ti/Makefile | 6 +- > > > .../ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso | 81 +++++++++++++++++++ > > > 2 files changed, 86 insertions(+), 1 deletion(-) > > > create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso > > > > > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > > > index f8e47278df43..2d798ef415e4 100644 > > > --- a/arch/arm64/boot/dts/ti/Makefile > > > +++ b/arch/arm64/boot/dts/ti/Makefile > > > @@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb > > > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > > > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb > > > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo > > > +dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo > > > # Build time test only, enabled by CONFIG_OF_ALL_DTBS > > > k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \ > > > @@ -148,6 +149,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ > > > k3-j721s2-evm-pcie1-ep.dtbo > > > k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \ > > > k3-j784s4-evm-quad-port-eth-exp1.dtbo > > > +k3-j784s4-evm-usxgmii-exp1-exp2.dtbs := k3-j784s4-evm.dtb \ > > > + k3-j784s4-evm-usxgmii-exp1-exp2.dtbo\ > > > > I have doubts this commit was ever built. It clearly fails, just like > > now linux-next fails. > > > > Apologies for the syntax error here, I will fix it and post next > version. Series dropped. Looks like it slipped my checker as well :(
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index f8e47278df43..2d798ef415e4 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo # Build time test only, enabled by CONFIG_OF_ALL_DTBS k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \ @@ -148,6 +149,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ k3-j721s2-evm-pcie1-ep.dtbo k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \ k3-j784s4-evm-quad-port-eth-exp1.dtbo +k3-j784s4-evm-usxgmii-exp1-exp2.dtbs := k3-j784s4-evm.dtb \ + k3-j784s4-evm-usxgmii-exp1-exp2.dtbo dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-beagleplay-csi2-tevi-ov5640.dtb \ k3-am625-sk-csi2-imx219.dtb \ @@ -169,7 +172,8 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-j721e-evm-pcie0-ep.dtb \ k3-j721e-sk-csi2-dual-imx219-dtbs \ k3-j721s2-evm-pcie1-ep.dtb \ - k3-j784s4-evm-quad-port-eth-exp1.dtb + k3-j784s4-evm-quad-port-eth-exp1.dtb \ + k3-j784s4-evm-usxgmii-exp1-exp2.dtb # Enable support for device-tree overlays DTC_FLAGS_k3-am625-beagleplay += -@ diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso new file mode 100644 index 000000000000..d5f8c8531923 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/** + * DT Overlay for CPSW9G in dual port fixed-link USXGMII mode using ENET-1 + * and ENET-2 Expansion slots of J784S4 EVM. + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/phy/phy.h> + +#include "k3-serdes.h" + +&{/} { + aliases { + ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1"; + ethernet2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2"; + ethernet3 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1"; + }; +}; + +&main_cpsw0 { + pinctrl-names = "default"; + status = "okay"; +}; + +&main_cpsw0_port1 { + phy-mode = "usxgmii"; + mac-address = [00 00 00 00 00 00]; + phys = <&cpsw0_phy_gmii_sel 1>, <&serdes2_usxgmii_link>; + phy-names = "mac", "serdes"; + status = "okay"; + fixed-link { + speed = <5000>; + full-duplex; + }; +}; + +&main_cpsw0_port2 { + phy-mode = "usxgmii"; + mac-address = [00 00 00 00 00 00]; + phys = <&cpsw0_phy_gmii_sel 2>, <&serdes2_usxgmii_link>; + phy-names = "mac", "serdes"; + status = "okay"; + fixed-link { + speed = <5000>; + full-duplex; + }; +}; + +&serdes_wiz2 { + assigned-clock-parents = <&k3_clks 406 9>; /* Use 156.25 MHz clock for USXGMII */ + status = "okay"; +}; + +&serdes2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + serdes2_usxgmii_link: phy@2 { + reg = <2>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_USXGMII>; + resets = <&serdes_wiz2 3>, <&serdes_wiz2 4>; + }; +}; + +&serdes_ln_ctrl { + idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_PCIE1_LANE1>, + <J784S4_SERDES0_LANE2_IP3_UNUSED>, <J784S4_SERDES0_LANE3_USB>, + <J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_PCIE0_LANE1>, + <J784S4_SERDES1_LANE2_PCIE0_LANE2>, <J784S4_SERDES1_LANE3_PCIE0_LANE3>, + <J784S4_SERDES2_LANE0_IP2_UNUSED>, <J784S4_SERDES2_LANE1_IP2_UNUSED>, + <J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>; +};