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Sat, 30 Mar 2024 00:05:01 +0300 From: Dmitry Rokosov To: , , , , , , , CC: , , , , , , , Dmitry Rokosov Subject: [PATCH v1 3/4] arm64: dts: amlogic: a1: add new input clock 'sys_pll_div16' to clkc_periphs Date: Sat, 30 Mar 2024 00:04:41 +0300 Message-ID: <20240329210453.27530-4-ddrokosov@salutedevices.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240329210453.27530-1-ddrokosov@salutedevices.com> References: <20240329210453.27530-1-ddrokosov@salutedevices.com> MIME-Version: 1.0 X-Originating-IP: [100.64.160.123] X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184500 [Mar 29 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: ddrokosov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 14 0.3.14 5a0c43d8a1c3c0e5b0916cc02a90d4b950c01f96, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;smtp.sberdevices.ru:7.1.1,5.0.1;100.64.160.123:7.1.2;salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/29 16:52:00 #24511844 X-KSMG-AntiVirus-Status: Clean, skipped X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240329_140504_119905_DEC6AAB2 X-CRM114-Status: GOOD ( 11.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The input clock 'sys_pll_div16' is a clock with a fixed ratio inherited from the main system PLL. Signed-off-by: Dmitry Rokosov --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 07fd0be828d4..0de809f4d42c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -747,10 +747,12 @@ clkc_periphs: clock-controller@800 { <&clkc_pll CLKID_FCLK_DIV5>, <&clkc_pll CLKID_FCLK_DIV7>, <&clkc_pll CLKID_HIFI_PLL>, + <&clkc_pll CLKID_SYS_PLL_DIV16>, <&xtal>; clock-names = "fclk_div2", "fclk_div3", "fclk_div5", "fclk_div7", - "hifi_pll", "xtal"; + "hifi_pll", "sys_pll_div16", + "xtal"; }; i2c0: i2c@1400 {