From patchwork Wed Apr 3 17:06:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13616519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59718CD128A for ; Wed, 3 Apr 2024 17:16:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Wk9YNgDjxzJTOHJTw5C4AKaWxON4PTixU70WIYkFsrQ=; b=S1ZtjfD2xEVu76 ocPAD2kug/qZykg27Wh00BUyFdFaBqkZJ8nAiGfIl5SU0Wopo+8v4p2/3Qjk8AcDsuTK9UYpSoUk1 e7THXDp5iuEQr5o5YR8pXdj+MnRQKtWChd9Gd6n1Hae+2ivSqHpH9Bl4XIjiYeWLk+cg+JyrUzPjb XBoN8J8vJIfhCyWRtapAQWaeHkVOyyBj869VP+37KMZVg6w9MQ4V61V2Kr9W/x3UXbMM/RGb7yJ1e cd1ixvbnPJOoeli5QyovwXrQf0vy8vLVeRwSGru+DoAd4jxqFeWWjW1JhuvPxM5dNrtM+bntw3FCg e5KoWTOo1QkEbW1hasgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rs4DR-0000000H84t-2qy6; Wed, 03 Apr 2024 17:16:01 +0000 Received: from mgamail.intel.com ([198.175.65.12]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rs4DP-0000000H839-0buD for linux-arm-kernel@lists.infradead.org; Wed, 03 Apr 2024 17:16:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712164559; x=1743700559; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QAzx1E0qxAXDPG02iR8YPBeHMYqiPk9cu41jsTna2jo=; b=kqwcBgin8UsgzOYibUZmqFlv0p64AIAXpsR1xzMg/oOvK5QS8IVFOpaU YVdpFVYkZQNc+PsJDDWOMKLH0kLz5PQvgmWdC6baUd/HxQMfrxztMgr/L 8g1WfZXzzEnC/ZL28cwZJ6gw66l01k3iVprx9youfm+O4mbvd+95hTuHw rIIlD8jIgO4OSmal7z6N8/UZ9inZ9c3cEbwmzPYdqg97af3+oQ44QT3u4 Fi2SzQ/TVVPyFQXRgpRFGx4Zmj+nUDfGJLLBNKCZbE6M/H1lbiE4gDwF0 GgD8b8njMEJxv+RXZ665q1xYnoVj4KExPJB393LltJFyKaq1ARsteaMVG w==; X-CSE-ConnectionGUID: PxIu3M+aR6Km8kZng8hPcQ== X-CSE-MsgGUID: GVaKGgsaSqiN3d1Y81k+kA== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="18863539" X-IronPort-AV: E=Sophos;i="6.07,177,1708416000"; d="scan'208";a="18863539" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 10:15:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="937085337" X-IronPort-AV: E=Sophos;i="6.07,177,1708416000"; d="scan'208";a="937085337" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 03 Apr 2024 10:15:54 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id A8DAB57D; Wed, 3 Apr 2024 20:15:53 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Mark Brown Subject: [PATCH v1 2/5] spi: pxa2xx: Drop struct pxa2xx_spi_chip Date: Wed, 3 Apr 2024 20:06:36 +0300 Message-ID: <20240403171550.1074644-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240403171550.1074644-1-andriy.shevchenko@linux.intel.com> References: <20240403171550.1074644-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240403_101559_275901_7670F98B X-CRM114-Status: GOOD ( 17.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org No more users. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-pxa2xx-dma.c | 9 ++------- drivers/spi/spi-pxa2xx.c | 25 ------------------------- drivers/spi/spi-pxa2xx.h | 14 -------------- 3 files changed, 2 insertions(+), 46 deletions(-) diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c index 751cb0f77b62..d77279c3acd8 100644 --- a/drivers/spi/spi-pxa2xx-dma.c +++ b/drivers/spi/spi-pxa2xx-dma.c @@ -231,16 +231,11 @@ int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip, u8 bits_per_word, u32 *burst_code, u32 *threshold) { - struct pxa2xx_spi_chip *chip_info = spi->controller_data; struct driver_data *drv_data = spi_controller_get_devdata(spi->controller); u32 dma_burst_size = drv_data->controller_info->dma_burst_size; - /* - * If the DMA burst size is given in chip_info we use that, - * otherwise we use the default. Also we use the default FIFO - * thresholds for now. - */ - *burst_code = chip_info ? chip_info->dma_burst_size : dma_burst_size; + /* We use the default the DMA burst size and FIFO thresholds for now */ + *burst_code = dma_burst_size; *threshold = SSCR1_RxTresh(RX_THRESH_DFLT) | SSCR1_TxTresh(TX_THRESH_DFLT); diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index cc0e54f8d2c3..00aa33c937bf 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1154,7 +1154,6 @@ static int pxa2xx_spi_unprepare_transfer(struct spi_controller *controller) static int setup(struct spi_device *spi) { - struct pxa2xx_spi_chip *chip_info; struct chip_data *chip; const struct lpss_config *config; struct driver_data *drv_data = @@ -1218,25 +1217,6 @@ static int setup(struct spi_device *spi) chip->timeout = TIMOUT_DFLT; } - /* - * Protocol drivers may change the chip settings, so... - * if chip_info exists, use it. - */ - chip_info = spi->controller_data; - - /* chip_info isn't always needed */ - if (chip_info) { - if (chip_info->timeout) - chip->timeout = chip_info->timeout; - if (chip_info->tx_threshold) - tx_thres = chip_info->tx_threshold; - if (chip_info->tx_hi_threshold) - tx_hi_thres = chip_info->tx_hi_threshold; - if (chip_info->rx_threshold) - rx_thres = chip_info->rx_threshold; - chip->dma_threshold = 0; - } - chip->cr1 = 0; if (spi_controller_is_target(drv_data->controller)) { chip->cr1 |= SSCR1_SCFR; @@ -1256,11 +1236,6 @@ static int setup(struct spi_device *spi) chip->lpss_tx_threshold = tx_thres; } - /* - * Set DMA burst and threshold outside of chip_info path so that if - * chip_info goes away after setting chip->enable_dma, the burst and - * threshold can still respond to changes in bits_per_word. - */ if (chip->enable_dma) { /* Set up legal burst and threshold for DMA */ if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi, diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index f1097c96c50f..ae9c99bc9f6c 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -35,20 +35,6 @@ struct pxa2xx_spi_controller { struct ssp_device ssp; }; -/* - * The controller specific data for SPI target devices - * (resides in spi_board_info.controller_data), - * copied to spi_device.platform_data ... mostly for - * DMA tuning. - */ -struct pxa2xx_spi_chip { - u8 tx_threshold; - u8 tx_hi_threshold; - u8 rx_threshold; - u8 dma_burst_size; - u32 timeout; -}; - struct spi_controller; struct spi_device; struct spi_transfer;