From patchwork Thu Apr 4 12:25:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13617856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B09DCCD129A for ; Thu, 4 Apr 2024 13:34:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hZaywyQK3afISpRAPvgJ3jB3DPnbbRuIDMoX1hOjzSs=; b=3kYZhIPio6aGGF OUh4b+S7YA7yoG1W7DYct6J07ZlUtInHBuUn9z1TxeNtxXZtnzhY1Q6kWAw1GvCz5jzYQxppKlC2S m0Bbx1d58CFA/TRmV3bBUio2TmzyPmCzlMO7pfY0wzEz6CwdVRSIqLqefzrPG7n+9znCP64qNKmk2 xiz2ila8O57Ng74QcM+qcB6HyWwApiuRMI/tLh/RupU4xsqRuG/DMpHdZj2HSlSRgzo0WoBhjc712 D7RaBJImUlLNt+S1JGX9XIF7eWPqCLV6DHL+zyOOdusy67isdrePDmW4ur5Gp7h36FsHVd6PT8CBe UQRTY9y5gweAHkstlWKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rsNEl-00000002pLG-2JOx; Thu, 04 Apr 2024 13:34:39 +0000 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rsMBl-00000002bHK-3cXH for linux-arm-kernel@lists.infradead.org; Thu, 04 Apr 2024 12:27:34 +0000 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-3438d7a05aaso544529f8f.0 for ; Thu, 04 Apr 2024 05:27:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1712233648; x=1712838448; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hCoibUgVXrDhj6Ie2d9/sHJBy2MlyQN1DiiH4mHtSsU=; b=qmJmHoW33hbN4NzqlQUUm1F3n0++PmgRJCX+uAbEuTUsIxT3UiPetgZpoJw4Vb+trG zX+wstD68uxtkUYiBsxrgVPcMlHljfFUUaWIOEjjTLlYiDZw/R+gjYH46dA9Y4pyZNm4 nBBFoT91TgGbpMlXOtKPv1Wj2zv8bl088k3esBRrj3bVifc1J0RPa1S93bUktcGXW0Ra iVKLQxG5J4BvrynG20tKIk/1/uxK7lFPz1TaAlYyy04IAbc8yQ8SOJZMYdhuWnRfIv5G 0THKkAXmUJ73YKisn96DGibjCHfkLFyYCI4HveJ3SbVjXpjGKpIyo/bNsKIWEYoW6bvf 8Tig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712233648; x=1712838448; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hCoibUgVXrDhj6Ie2d9/sHJBy2MlyQN1DiiH4mHtSsU=; b=bp8KoFpk82C591KYFvBoRuG8HPWqz6ubXl5DVjJB/xAgfDbGFhm5we7f0LW13i1q1M WYajlxixOHJkOi76bDjqrX+wAQMu5t8eO1BL55yHT+OJ1uG1QSOfSq6ymBXVJE5Bh7Ip FRgwfJwLHGvpyDt/d9UfwOuowUmCkSfMtEhDiI3Ve1e2W27MOdj0SBjzCHgwRKqBSWzW BVJ0bjfVOxOmQNxQ5gr3R4Tx2Iz/UuRhmL7vtt11w88weRD6T/maR2DRWGIPrSV0BtdU P8NbqChJngftr7VlXva/oxl/hwsKPxB/72uxGnWf4QeHTF4yAs7w5slXEq6jlStJy3bg MZXQ== X-Forwarded-Encrypted: i=1; AJvYcCULVtbo2/vGdQffeeXj2rs9tXswkSI9cxh24q2GTBFScOz7NBB/zWWjp1n7z0NkaT0nhcrq3fff8lH6n+oPNdzWxohkyU09BIQQOrYksBjm/4sBbkw= X-Gm-Message-State: AOJu0YzGO6PRIYIrgsoqssqGWiqUMVWXt0a6Jgaf05feTaZxBLD2XIVT wN+hNIshY4PVCbi3tCmIwXCKBa5ZMajbeoUsHEMnoaF58WrYrMmhXl7baIfp12k= X-Google-Smtp-Source: AGHT+IEUfAM9zfc1fEcONBjRrQZRgm3rufWc9YdQbrZ/Uj7Mr8B0aLztpGDLAE0O3aOZeWldQ4nn4g== X-Received: by 2002:a05:6000:23a:b0:33e:710a:b699 with SMTP id l26-20020a056000023a00b0033e710ab699mr1951763wrz.9.1712233648344; Thu, 04 Apr 2024 05:27:28 -0700 (PDT) Received: from gpeter-l.roam.corp.google.com ([148.252.128.204]) by smtp.gmail.com with ESMTPSA id bu14-20020a056000078e00b003434b41c83fsm12106303wrb.81.2024.04.04.05.27.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Apr 2024 05:27:27 -0700 (PDT) From: Peter Griffin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, jejb@linux.ibm.com, martin.petersen@oracle.com, chanho61.park@samsung.com, ebiggers@kernel.org Cc: linux-scsi@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, Peter Griffin Subject: [PATCH 13/17] scsi: ufs: host: ufs-exynos: add EXYNOS_UFS_OPT_TIMER_TICK_SELECT option Date: Thu, 4 Apr 2024 13:25:55 +0100 Message-ID: <20240404122559.898930-14-peter.griffin@linaro.org> X-Mailer: git-send-email 2.44.0.478.gd926399ef9-goog In-Reply-To: <20240404122559.898930-1-peter.griffin@linaro.org> References: <20240404122559.898930-1-peter.griffin@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240404_052730_075817_FE1D5D5C X-CRM114-Status: GOOD ( 11.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This option is intended to be set for SoCs that have HCI_V2P1_CTRL register and can select their tick source via IA_TICK_SEL bit. Source clock selection for timer tick 0x0 = Bus clock (aclk) 0x1 = Function clock (mclk) Signed-off-by: Peter Griffin Acked-by: Krzysztof Kozlowski Tested-by: Will McVicker --- drivers/ufs/host/ufs-exynos.c | 9 +++++++++ drivers/ufs/host/ufs-exynos.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index 7b68229f6264..1bfda9c75703 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -50,6 +50,8 @@ #define HCI_ERR_EN_N_LAYER 0x80 #define HCI_ERR_EN_T_LAYER 0x84 #define HCI_ERR_EN_DME_LAYER 0x88 +#define HCI_V2P1_CTRL 0x8C +#define IA_TICK_SEL BIT(16) #define HCI_CLKSTOP_CTRL 0xB0 #define REFCLKOUT_STOP BIT(4) #define MPHY_APBCLK_STOP BIT(3) @@ -1005,6 +1007,13 @@ static void exynos_ufs_fit_aggr_timeout(struct exynos_ufs *ufs) { u32 val; + /* Select function clock (mclk) for timer tick */ + if (ufs->opts & EXYNOS_UFS_OPT_TIMER_TICK_SELECT) { + val = hci_readl(ufs, HCI_V2P1_CTRL); + val |= IA_TICK_SEL; + hci_writel(ufs, val, HCI_V2P1_CTRL); + } + val = exynos_ufs_calc_time_cntr(ufs, IATOVAL_NSEC / CNTR_DIV_VAL); hci_writel(ufs, val & CNT_VAL_1US_MASK, HCI_1US_TO_CNT_VAL); } diff --git a/drivers/ufs/host/ufs-exynos.h b/drivers/ufs/host/ufs-exynos.h index 0fc21b6bbfcd..acf07cc54684 100644 --- a/drivers/ufs/host/ufs-exynos.h +++ b/drivers/ufs/host/ufs-exynos.h @@ -222,6 +222,7 @@ struct exynos_ufs { #define EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER BIT(4) #define EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR BIT(5) #define EXYNOS_UFS_OPT_UFSPR_SECURE BIT(6) +#define EXYNOS_UFS_OPT_TIMER_TICK_SELECT BIT(7) }; #define for_each_ufs_rx_lane(ufs, i) \