diff mbox series

[v2,4/9] arm64/cpufeature: Simplify detect PE support for FEAT_NMI

Message ID 20240411064858.3232574-5-liaochang1@huawei.com (mailing list archive)
State New, archived
Headers show
Series Rework the DAIF mask, unmask and track API | expand

Commit Message

Liao Chang April 11, 2024, 6:48 a.m. UTC 
From: Jinjie Ruan <ruanjinjie@huawei.com>

Simplify the Non-maskable Interrupts feature implementation with
ARM64_CPUID_FIELDS macro.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Liao Chang <liaochang1@huawei.com>
---
 arch/arm64/kernel/cpufeature.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

Comments

Mark Brown April 15, 2024, 1:12 a.m. UTC | #1 
On Thu, Apr 11, 2024 at 06:48:53AM +0000, Liao Chang wrote:
> From: Jinjie Ruan <ruanjinjie@huawei.com>
> 
> Simplify the Non-maskable Interrupts feature implementation with
> ARM64_CPUID_FIELDS macro.

Just squash this into the patch you're updating (I already have that
locally for my half rebased version of the series).
Liao Chang April 15, 2024, 9:48 a.m. UTC | #2 
Mark,

在 2024/4/15 9:12, Mark Brown 写道:
> On Thu, Apr 11, 2024 at 06:48:53AM +0000, Liao Chang wrote:
>> From: Jinjie Ruan <ruanjinjie@huawei.com>
>>
>> Simplify the Non-maskable Interrupts feature implementation with
>> ARM64_CPUID_FIELDS macro.
> 
> Just squash this into the patch you're updating (I already have that
> locally for my half rebased version of the series).

Acked, thanks for suggestion. I've squashed the 4th and 5th patches into
the 2nd patch of the series in v2. Please review the updated series v3 and
let me know if you have any futher comments.

Thanks.
diff mbox series

Patch

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index fb9e52c84fda..99c3bc74008d 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2905,24 +2905,16 @@  static const struct arm64_cpu_capabilities arm64_features[] = {
 		.desc = "Non-maskable Interrupts present",
 		.capability = ARM64_HAS_NMI,
 		.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
-		.sys_reg = SYS_ID_AA64PFR1_EL1,
-		.sign = FTR_UNSIGNED,
-		.field_pos = ID_AA64PFR1_EL1_NMI_SHIFT,
-		.field_width = 4,
-		.min_field_value = ID_AA64PFR1_EL1_NMI_IMP,
 		.matches = has_cpuid_feature,
+		ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, NMI, IMP)
 	},
 	{
 		.desc = "Non-maskable Interrupts enabled",
 		.capability = ARM64_USES_NMI,
 		.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
-		.sys_reg = SYS_ID_AA64PFR1_EL1,
-		.sign = FTR_UNSIGNED,
-		.field_pos = ID_AA64PFR1_EL1_NMI_SHIFT,
-		.field_width = 4,
-		.min_field_value = ID_AA64PFR1_EL1_NMI_IMP,
 		.matches = use_nmi,
 		.cpu_enable = nmi_enable,
+		ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, NMI, IMP)
 	},
 #endif
 	{},