| Message ID | 20240417091442.170505-3-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MediaTek DVFSRC Bus Bandwidth and Regulator knobs | expand |
On Wed, 17 Apr 2024 11:14:37 +0200, AngeloGioacchino Del Regno wrote: > Add bindings for the MediaTek External Memory Interface Interconnect, > which providers support system bandwidth requirements through Dynamic > Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. > > This adds bindings for MediaTek MT8183 and MT8195 SoCs. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++ > .../interconnect/mediatek,mt8183.h | 23 ++++++ > .../interconnect/mediatek,mt8195.h | 44 +++++++++++ > 3 files changed, 143 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h > create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.example.dtb: /example-0/soc/system-controller@10012000: failed to match any schema with compatible: ['mediatek,mt8195-dvfsrc'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240417091442.170505-3-angelogioacchino.delregno@collabora.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Wed, Apr 17, 2024 at 11:14:37AM +0200, AngeloGioacchino Del Regno wrote: > Add bindings for the MediaTek External Memory Interface Interconnect, > which providers support system bandwidth requirements through Dynamic > Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. > > This adds bindings for MediaTek MT8183 and MT8195 SoCs. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++ > .../interconnect/mediatek,mt8183.h | 23 ++++++ > .../interconnect/mediatek,mt8195.h | 44 +++++++++++ > 3 files changed, 143 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h > create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h > > diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > new file mode 100644 > index 000000000000..3ad60fd21f83 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > @@ -0,0 +1,76 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek External Memory Interface (EMI) Interconnect > + > +maintainers: > + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > + > +description: | > + EMI interconnect providers support system bandwidth requirements through > + Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. > + The provider is able to communicate with the DVFSRC through Secure Monitor > + Call (SMC). > + > + ICC provider ICC Nodes > + ---- ---- > + _________ |CPU | |--- |VPU | > + _____ | |----- ---- | ---- > + | |->| DRAM | ---- | ---- > + |DRAM |->|scheduler|----- |GPU | |--- |DISP| > + | |->| (EMI) | ---- | ---- > + |_____|->|_________|---. ----- | ---- > + /|\ `-|MMSYS|--|--- |VDEC| > + | ----- | ---- > + | | ---- > + | change DRAM freq |--- |VENC| > + -------- | ---- > + SMC --> | DVFSRC | | ---- > + -------- |--- |IMG | > + | ---- > + | ---- > + |--- |CAM | > + ---- > + > +properties: > + compatible: > + enum: > + - mediatek,mt8183-emi > + - mediatek,mt8195-emi > + > + reg: > + maxItems: 1 > + > + '#interconnect-cells': > + const: 1 > + > +required: > + - compatible > + - '#interconnect-cells' > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/interconnect/mediatek,mt8195.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + system-controller@10012000 { > + compatible = "mediatek,mt8195-dvfsrc"; > + reg = <0 0x10012000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + emi_icc: interconnect@1 { > + compatible = "mediatek,mt8195-emi"; > + reg = <1>; > + #interconnect-cells = <1>; There's not really any need for this node. Just put #interconnect-cells in the parent. Rob
Il 17/04/24 16:54, Rob Herring ha scritto: > On Wed, Apr 17, 2024 at 11:14:37AM +0200, AngeloGioacchino Del Regno wrote: >> Add bindings for the MediaTek External Memory Interface Interconnect, >> which providers support system bandwidth requirements through Dynamic >> Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. >> >> This adds bindings for MediaTek MT8183 and MT8195 SoCs. >> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >> --- >> .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++ >> .../interconnect/mediatek,mt8183.h | 23 ++++++ >> .../interconnect/mediatek,mt8195.h | 44 +++++++++++ >> 3 files changed, 143 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml >> create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h >> create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h >> >> diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml >> new file mode 100644 >> index 000000000000..3ad60fd21f83 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml >> @@ -0,0 +1,76 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: MediaTek External Memory Interface (EMI) Interconnect >> + >> +maintainers: >> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >> + >> +description: | >> + EMI interconnect providers support system bandwidth requirements through >> + Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. >> + The provider is able to communicate with the DVFSRC through Secure Monitor >> + Call (SMC). >> + >> + ICC provider ICC Nodes >> + ---- ---- >> + _________ |CPU | |--- |VPU | >> + _____ | |----- ---- | ---- >> + | |->| DRAM | ---- | ---- >> + |DRAM |->|scheduler|----- |GPU | |--- |DISP| >> + | |->| (EMI) | ---- | ---- >> + |_____|->|_________|---. ----- | ---- >> + /|\ `-|MMSYS|--|--- |VDEC| >> + | ----- | ---- >> + | | ---- >> + | change DRAM freq |--- |VENC| >> + -------- | ---- >> + SMC --> | DVFSRC | | ---- >> + -------- |--- |IMG | >> + | ---- >> + | ---- >> + |--- |CAM | >> + ---- >> + >> +properties: >> + compatible: >> + enum: >> + - mediatek,mt8183-emi >> + - mediatek,mt8195-emi >> + >> + reg: >> + maxItems: 1 >> + >> + '#interconnect-cells': >> + const: 1 >> + >> +required: >> + - compatible >> + - '#interconnect-cells' >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interconnect/mediatek,mt8195.h> >> + >> + soc { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + system-controller@10012000 { >> + compatible = "mediatek,mt8195-dvfsrc"; >> + reg = <0 0x10012000 0 0x1000>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + emi_icc: interconnect@1 { >> + compatible = "mediatek,mt8195-emi"; >> + reg = <1>; >> + #interconnect-cells = <1>; > > > There's not really any need for this node. Just put #interconnect-cells > in the parent. > Actually, I modeled it to be a subnode of the DVFSRC for multiple reasons: 1. Some SoCs have more than one interconnect on the DVFSRC (two different kinds of EMI interconnect, and then also a SMI interconnect); and 2. Some boards will want to not enable the interconnect driver because some of those are not battery powered (so they just keep the knobs at full thrust from the bootloader and never care scaling busses); and 3. Some DVFSRC interconnect features may depend on firmware (but I'm not sure which ones and which SoCs, as there are lots of SMI/EMI ICC things that are not implemented yet with this series). The alternative would've been to add a property to enable, or disable, the SMI ICC (not present in this series), and/or one, or the other kind of EMI ICC (this series implements only the simpler EMI ICC, and I keep saying "the other" because I currently don't remember the name).... which is really ugly. Ideas? :-) Cheers, Angelo > Rob
On Wed, Apr 17, 2024 at 05:32:54PM +0200, AngeloGioacchino Del Regno wrote: > Il 17/04/24 16:54, Rob Herring ha scritto: > > On Wed, Apr 17, 2024 at 11:14:37AM +0200, AngeloGioacchino Del Regno wrote: > > > Add bindings for the MediaTek External Memory Interface Interconnect, > > > which providers support system bandwidth requirements through Dynamic > > > Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. > > > > > > This adds bindings for MediaTek MT8183 and MT8195 SoCs. > > > > > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > > > --- > > > .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++ > > > .../interconnect/mediatek,mt8183.h | 23 ++++++ > > > .../interconnect/mediatek,mt8195.h | 44 +++++++++++ > > > 3 files changed, 143 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > > > create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h > > > create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h > > > > > > diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > > > new file mode 100644 > > > index 000000000000..3ad60fd21f83 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml > > > @@ -0,0 +1,76 @@ > > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: MediaTek External Memory Interface (EMI) Interconnect > > > + > > > +maintainers: > > > + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > > > + > > > +description: | > > > + EMI interconnect providers support system bandwidth requirements through > > > + Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. > > > + The provider is able to communicate with the DVFSRC through Secure Monitor > > > + Call (SMC). > > > + > > > + ICC provider ICC Nodes > > > + ---- ---- > > > + _________ |CPU | |--- |VPU | > > > + _____ | |----- ---- | ---- > > > + | |->| DRAM | ---- | ---- > > > + |DRAM |->|scheduler|----- |GPU | |--- |DISP| > > > + | |->| (EMI) | ---- | ---- > > > + |_____|->|_________|---. ----- | ---- > > > + /|\ `-|MMSYS|--|--- |VDEC| > > > + | ----- | ---- > > > + | | ---- > > > + | change DRAM freq |--- |VENC| > > > + -------- | ---- > > > + SMC --> | DVFSRC | | ---- > > > + -------- |--- |IMG | > > > + | ---- > > > + | ---- > > > + |--- |CAM | > > > + ---- > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - mediatek,mt8183-emi > > > + - mediatek,mt8195-emi > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + '#interconnect-cells': > > > + const: 1 > > > + > > > +required: > > > + - compatible > > > + - '#interconnect-cells' > > > + > > > +unevaluatedProperties: false > > > + > > > +examples: > > > + - | > > > + #include <dt-bindings/interconnect/mediatek,mt8195.h> > > > + > > > + soc { > > > + #address-cells = <2>; > > > + #size-cells = <2>; > > > + > > > + system-controller@10012000 { > > > + compatible = "mediatek,mt8195-dvfsrc"; > > > + reg = <0 0x10012000 0 0x1000>; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + emi_icc: interconnect@1 { > > > + compatible = "mediatek,mt8195-emi"; > > > + reg = <1>; > > > + #interconnect-cells = <1>; > > > > > > There's not really any need for this node. Just put #interconnect-cells > > in the parent. > > > > Actually, I modeled it to be a subnode of the DVFSRC for multiple reasons: > > 1. Some SoCs have more than one interconnect on the DVFSRC (two different kinds > of EMI interconnect, and then also a SMI interconnect); and > > 2. Some boards will want to not enable the interconnect driver because some of > those are not battery powered (so they just keep the knobs at full thrust > from the bootloader and never care scaling busses); and > > 3. Some DVFSRC interconnect features may depend on firmware (but I'm not > sure which ones and which SoCs, as there are lots of SMI/EMI ICC things that > are not implemented yet with this series). > > The alternative would've been to add a property to enable, or disable, the SMI ICC > (not present in this series), and/or one, or the other kind of EMI ICC (this series > implements only the simpler EMI ICC, and I keep saying "the other" because I > currently don't remember the name).... which is really ugly. > > Ideas? :-) Just provide that reasoning in the commit msg. Rob
Il 17/04/24 21:14, Rob Herring ha scritto: > On Wed, Apr 17, 2024 at 05:32:54PM +0200, AngeloGioacchino Del Regno wrote: >> Il 17/04/24 16:54, Rob Herring ha scritto: >>> On Wed, Apr 17, 2024 at 11:14:37AM +0200, AngeloGioacchino Del Regno wrote: >>>> Add bindings for the MediaTek External Memory Interface Interconnect, >>>> which providers support system bandwidth requirements through Dynamic >>>> Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. >>>> >>>> This adds bindings for MediaTek MT8183 and MT8195 SoCs. >>>> >>>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >>>> --- >>>> .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++ >>>> .../interconnect/mediatek,mt8183.h | 23 ++++++ >>>> .../interconnect/mediatek,mt8195.h | 44 +++++++++++ >>>> 3 files changed, 143 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml >>>> create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h >>>> create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h >>>> >>>> diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml >>>> new file mode 100644 >>>> index 000000000000..3ad60fd21f83 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml >>>> @@ -0,0 +1,76 @@ >>>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >>>> +%YAML 1.2 >>>> +--- >>>> +$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml# >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>> + >>>> +title: MediaTek External Memory Interface (EMI) Interconnect >>>> + >>>> +maintainers: >>>> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >>>> + >>>> +description: | >>>> + EMI interconnect providers support system bandwidth requirements through >>>> + Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. >>>> + The provider is able to communicate with the DVFSRC through Secure Monitor >>>> + Call (SMC). >>>> + >>>> + ICC provider ICC Nodes >>>> + ---- ---- >>>> + _________ |CPU | |--- |VPU | >>>> + _____ | |----- ---- | ---- >>>> + | |->| DRAM | ---- | ---- >>>> + |DRAM |->|scheduler|----- |GPU | |--- |DISP| >>>> + | |->| (EMI) | ---- | ---- >>>> + |_____|->|_________|---. ----- | ---- >>>> + /|\ `-|MMSYS|--|--- |VDEC| >>>> + | ----- | ---- >>>> + | | ---- >>>> + | change DRAM freq |--- |VENC| >>>> + -------- | ---- >>>> + SMC --> | DVFSRC | | ---- >>>> + -------- |--- |IMG | >>>> + | ---- >>>> + | ---- >>>> + |--- |CAM | >>>> + ---- >>>> + >>>> +properties: >>>> + compatible: >>>> + enum: >>>> + - mediatek,mt8183-emi >>>> + - mediatek,mt8195-emi >>>> + >>>> + reg: >>>> + maxItems: 1 >>>> + >>>> + '#interconnect-cells': >>>> + const: 1 >>>> + >>>> +required: >>>> + - compatible >>>> + - '#interconnect-cells' >>>> + >>>> +unevaluatedProperties: false >>>> + >>>> +examples: >>>> + - | >>>> + #include <dt-bindings/interconnect/mediatek,mt8195.h> >>>> + >>>> + soc { >>>> + #address-cells = <2>; >>>> + #size-cells = <2>; >>>> + >>>> + system-controller@10012000 { >>>> + compatible = "mediatek,mt8195-dvfsrc"; >>>> + reg = <0 0x10012000 0 0x1000>; >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + >>>> + emi_icc: interconnect@1 { >>>> + compatible = "mediatek,mt8195-emi"; >>>> + reg = <1>; >>>> + #interconnect-cells = <1>; >>> >>> >>> There's not really any need for this node. Just put #interconnect-cells >>> in the parent. >>> >> >> Actually, I modeled it to be a subnode of the DVFSRC for multiple reasons: >> >> 1. Some SoCs have more than one interconnect on the DVFSRC (two different kinds >> of EMI interconnect, and then also a SMI interconnect); and >> >> 2. Some boards will want to not enable the interconnect driver because some of >> those are not battery powered (so they just keep the knobs at full thrust >> from the bootloader and never care scaling busses); and >> >> 3. Some DVFSRC interconnect features may depend on firmware (but I'm not >> sure which ones and which SoCs, as there are lots of SMI/EMI ICC things that >> are not implemented yet with this series). >> >> The alternative would've been to add a property to enable, or disable, the SMI ICC >> (not present in this series), and/or one, or the other kind of EMI ICC (this series >> implements only the simpler EMI ICC, and I keep saying "the other" because I >> currently don't remember the name).... which is really ugly. >> >> Ideas? :-) > > Just provide that reasoning in the commit msg. > Okay, that's sensible - should've done that in v1 even. My bad. Cheers Angelo > Rob
diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml new file mode 100644 index 000000000000..3ad60fd21f83 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek External Memory Interface (EMI) Interconnect + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: | + EMI interconnect providers support system bandwidth requirements through + Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. + The provider is able to communicate with the DVFSRC through Secure Monitor + Call (SMC). + + ICC provider ICC Nodes + ---- ---- + _________ |CPU | |--- |VPU | + _____ | |----- ---- | ---- + | |->| DRAM | ---- | ---- + |DRAM |->|scheduler|----- |GPU | |--- |DISP| + | |->| (EMI) | ---- | ---- + |_____|->|_________|---. ----- | ---- + /|\ `-|MMSYS|--|--- |VDEC| + | ----- | ---- + | | ---- + | change DRAM freq |--- |VENC| + -------- | ---- + SMC --> | DVFSRC | | ---- + -------- |--- |IMG | + | ---- + | ---- + |--- |CAM | + ---- + +properties: + compatible: + enum: + - mediatek,mt8183-emi + - mediatek,mt8195-emi + + reg: + maxItems: 1 + + '#interconnect-cells': + const: 1 + +required: + - compatible + - '#interconnect-cells' + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interconnect/mediatek,mt8195.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + system-controller@10012000 { + compatible = "mediatek,mt8195-dvfsrc"; + reg = <0 0x10012000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + emi_icc: interconnect@1 { + compatible = "mediatek,mt8195-emi"; + reg = <1>; + #interconnect-cells = <1>; + }; + }; + }; diff --git a/include/dt-bindings/interconnect/mediatek,mt8183.h b/include/dt-bindings/interconnect/mediatek,mt8183.h new file mode 100644 index 000000000000..1088c350258d --- /dev/null +++ b/include/dt-bindings/interconnect/mediatek,mt8183.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2021 MediaTek Inc. + * Copyright (c) 2024 Collabora Ltd. + * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8183_H +#define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8183_H + +#define SLAVE_DDR_EMI 0 +#define MASTER_MCUSYS 1 +#define MASTER_MFG 2 +#define MASTER_MMSYS 3 +#define MASTER_MM_VPU 4 +#define MASTER_MM_DISP 5 +#define MASTER_MM_VDEC 6 +#define MASTER_MM_VENC 7 +#define MASTER_MM_CAM 8 +#define MASTER_MM_IMG 9 +#define MASTER_MM_MDP 10 + +#endif diff --git a/include/dt-bindings/interconnect/mediatek,mt8195.h b/include/dt-bindings/interconnect/mediatek,mt8195.h new file mode 100644 index 000000000000..33e0e6cde732 --- /dev/null +++ b/include/dt-bindings/interconnect/mediatek,mt8195.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2020 MediaTek Inc. + * Copyright (c) 2024 Collabora Ltd. + * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8195_H +#define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8195_H + +#define SLAVE_DDR_EMI 0 +#define MASTER_MCUSYS 1 +#define MASTER_GPUSYS 2 +#define MASTER_MMSYS 3 +#define MASTER_MM_VPU 4 +#define MASTER_MM_DISP 5 +#define MASTER_MM_VDEC 6 +#define MASTER_MM_VENC 7 +#define MASTER_MM_CAM 8 +#define MASTER_MM_IMG 9 +#define MASTER_MM_MDP 10 +#define MASTER_VPUSYS 11 +#define MASTER_VPU_0 12 +#define MASTER_VPU_1 13 +#define MASTER_MDLASYS 14 +#define MASTER_MDLA_0 15 +#define MASTER_UFS 16 +#define MASTER_PCIE_0 17 +#define MASTER_PCIE_1 18 +#define MASTER_USB 19 +#define MASTER_DBGIF 20 +#define SLAVE_HRT_DDR_EMI 21 +#define MASTER_HRT_MMSYS 22 +#define MASTER_HRT_MM_DISP 23 +#define MASTER_HRT_MM_VDEC 24 +#define MASTER_HRT_MM_VENC 25 +#define MASTER_HRT_MM_CAM 26 +#define MASTER_HRT_MM_IMG 27 +#define MASTER_HRT_MM_MDP 28 +#define MASTER_HRT_DBGIF 29 +#define MASTER_WIFI 30 +#define MASTER_BT 31 +#define MASTER_NETSYS 32 +#endif
Add bindings for the MediaTek External Memory Interface Interconnect, which providers support system bandwidth requirements through Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. This adds bindings for MediaTek MT8183 and MT8195 SoCs. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++ .../interconnect/mediatek,mt8183.h | 23 ++++++ .../interconnect/mediatek,mt8195.h | 44 +++++++++++ 3 files changed, 143 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h