From patchwork Wed Apr 17 10:54:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13633201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CE81C4345F for ; Wed, 17 Apr 2024 11:04:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5ahQoi/yLdu9ftMHZz1Tz3y6Ilm+Y7Xu0sZIBR7WiXw=; b=naJqRjS7ym8usU Svwt1fGOeyu3kVXpw5bIu6keIhv34sPsG8eQT2pV6fjSUQEyufyyEDSsvgc34xILTHvqVtaOk81e/ Zn3laXW3HcCZBBGA+gB8VMaqZvEm3K6+03kjC8+F8wyIuyoM9bS1Y+fWuNfiHyLzR6gQEKVNb38rq W8mW0idVrkLOxw5xI61ckvSJc3+D2Yx6svnOYAbFEzFHL7yvRx7u3ksMr9xAkrP+II0yOmVQAfCAH XNts833F8DJzkaMAWI8flr9gaZhnGJzUJZ9KSwTa8XCpZy8yQ/H2Y3wibkU/UhgGjJknt4US3OBL7 /ZoUKoAhBZ1iRYALwedg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rx35F-0000000FhgO-4B5r; Wed, 17 Apr 2024 11:04:10 +0000 Received: from mgamail.intel.com ([192.198.163.19]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rx34z-0000000FhWQ-3Sf5 for linux-arm-kernel@lists.infradead.org; Wed, 17 Apr 2024 11:04:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713351834; x=1744887834; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Vq5PKqs9ah/OwO8gQhBqXkVQsO/11Ccf4mxzPDr98VU=; b=coqN4Muylx+VToeeirnOkWljdkhZF2/zm8T97Bx3x/x6e3A5DDua4iZE iqs27W0+EDAXSv76VlYNwfkJJalZBpZh6ekfkiL7GdHIlZZKNieR2P+No gtDdGqMnOxDTFGPnSQPqWThlLqAx9ZsqyqGiwGMa0+nFCs1BV4iZP7Iye gkDI3QyIzEKxL7RIsex8Fpz0j3JhjD2z1okvMLkg3lTN25aqrvLWXH+TY ENj0Rh3tKZ2gk1NPismlnUmTCkgVetjYVD6PpIIhqv7uzR+IQCrWXlg01 ZbfAfS9jgowlujgrKRV5e5Y5lKUX2JlX5cBHNtXQoDrECRa+RNTI36Czu A==; X-CSE-ConnectionGUID: Ud2yuARrQ8uRM59O0uVVLg== X-CSE-MsgGUID: cMLKOrMeQTyqnwWL4/iS8Q== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8698115" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8698115" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 04:03:40 -0700 X-CSE-ConnectionGUID: 3Ibp+FXhRzya5MRcf5MVig== X-CSE-MsgGUID: zvXo1qisReSOzfHnmLrEpw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="27380694" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 17 Apr 2024 04:03:37 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5678021A; Wed, 17 Apr 2024 14:03:36 +0300 (EEST) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Russell King Subject: [PATCH v3 1/9] spi: pxa2xx: Allow number of chip select pins to be read from property Date: Wed, 17 Apr 2024 13:54:28 +0300 Message-ID: <20240417110334.2671228-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240417110334.2671228-1-andriy.shevchenko@linux.intel.com> References: <20240417110334.2671228-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_040353_975193_7F86EEB2 X-CRM114-Status: GOOD ( 11.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In some cases the number of the chip select pins might come from the device property. Allow driver to use it. Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij --- drivers/spi/spi-pxa2xx.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 2f60b2fde8d5..ab6fd55237cd 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1357,6 +1357,7 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) struct ssp_device *ssp = NULL; const void *match; bool is_lpss_priv; + u32 num_cs = 1; int status; is_lpss_priv = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpss_priv"); @@ -1395,8 +1396,11 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) pdata->dma_filter = pxa2xx_spi_idma_filter; } + /* Read number of chip select pins, if provided */ + device_property_read_u32(dev, "num-cs", &num_cs); + + pdata->num_chipselect = num_cs; pdata->is_target = device_property_read_bool(dev, "spi-slave"); - pdata->num_chipselect = 1; pdata->enable_dma = true; pdata->dma_burst_size = 1;