From patchwork Wed Apr 17 10:54:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13633203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 206BBC04FFE for ; Wed, 17 Apr 2024 11:04:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LLT0kaC5uUZpZ6+MAYUfoWDnARC2U3sDnWurs5NtPAY=; b=URESbjY0YVyP28 ZSFTYqrFBqnIdWWjF173WIIwvrYJJ/sIStw0cLvGpAYIU41Jk1KGWKr6V9lhaDThr4hE5aql/jjTE GkTZlgf7KpAz3UBMPd1wUILp6eJQOtc5ohiqmMu0pIBE+AcF0V1T2+znWHn5HWMFHgxnGLZVwl1tw aW/MIemsXDefbcDsHuIi6O6+t0hC3YGlkd7rr6JxoknngpAr5I7JhimxgUKhmQ5AM0BduOvDZtLo+ HKw/DBlwCx3kAXizTXIK/JetLXvfxExP34973aY42Zwtwmg2UgRLfuWY5l1qNrG0eWuPIkrV+TTIy 91n6wMZ2p43LlFkDw/Ag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rx35I-0000000Fhj6-3QT6; Wed, 17 Apr 2024 11:04:12 +0000 Received: from mgamail.intel.com ([192.198.163.19]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rx354-0000000FhWF-40wY for linux-arm-kernel@lists.infradead.org; Wed, 17 Apr 2024 11:04:07 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713351839; x=1744887839; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fcw6oS8bqcoF1z0F8TEGeK5SgUH/8wJTF4cXw541tEA=; b=nl15Xtevihv7ks7zaCZRZzJ2/cIStDXgvNJguzHV6SgLIteDcRIIe4S6 mz8Ow5QCMwpv17kNCUSQrA2hWpYBzRg1IWbZQvxtQ38Tx6GFhipqZhEjJ C7SGI2heeyohUvMPIpw7fybrSSmuO7DmjyMipb6vogqDA/sRgCtmA9RMR ao3sAG5atn7TmHPevyNMLKl4Y5e+ncj/Naqu0nH/UOx+7EjwHr95i115i Hq5tiAm9NFf2Icb5XBQQlSYOAdyLSW8+69z+UEvt60k75/5AqGzOSMD7S x7G2h9zvBcm6aDGK/NUngs3gzTIIQNVbL2OI5vHy5CKn36w1yq/VRdnwY w==; X-CSE-ConnectionGUID: p3WiwJY4Q9KBPY7RkAfYNg== X-CSE-MsgGUID: V9O6DTTSRCWxytYXwzYd6w== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8698160" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8698160" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 04:03:43 -0700 X-CSE-ConnectionGUID: NiOePWkJTmar9IgsX+1sIA== X-CSE-MsgGUID: mrw5q278QeaT6K1T2BscNA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="22653279" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa006.fm.intel.com with ESMTP; 17 Apr 2024 04:03:40 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9C647F69; Wed, 17 Apr 2024 14:03:36 +0300 (EEST) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Russell King Subject: [PATCH v3 6/9] spi: pxa2xx: Drop struct pxa2xx_spi_chip Date: Wed, 17 Apr 2024 13:54:33 +0300 Message-ID: <20240417110334.2671228-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240417110334.2671228-1-andriy.shevchenko@linux.intel.com> References: <20240417110334.2671228-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_040359_125456_18084D93 X-CRM114-Status: GOOD ( 15.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org No more users. Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij --- drivers/spi/spi-pxa2xx-dma.c | 9 ++------- drivers/spi/spi-pxa2xx.c | 25 ------------------------- drivers/spi/spi-pxa2xx.h | 14 -------------- 3 files changed, 2 insertions(+), 46 deletions(-) diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c index 751cb0f77b62..d77279c3acd8 100644 --- a/drivers/spi/spi-pxa2xx-dma.c +++ b/drivers/spi/spi-pxa2xx-dma.c @@ -231,16 +231,11 @@ int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip, u8 bits_per_word, u32 *burst_code, u32 *threshold) { - struct pxa2xx_spi_chip *chip_info = spi->controller_data; struct driver_data *drv_data = spi_controller_get_devdata(spi->controller); u32 dma_burst_size = drv_data->controller_info->dma_burst_size; - /* - * If the DMA burst size is given in chip_info we use that, - * otherwise we use the default. Also we use the default FIFO - * thresholds for now. - */ - *burst_code = chip_info ? chip_info->dma_burst_size : dma_burst_size; + /* We use the default the DMA burst size and FIFO thresholds for now */ + *burst_code = dma_burst_size; *threshold = SSCR1_RxTresh(RX_THRESH_DFLT) | SSCR1_TxTresh(TX_THRESH_DFLT); diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index cc0e54f8d2c3..00aa33c937bf 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1154,7 +1154,6 @@ static int pxa2xx_spi_unprepare_transfer(struct spi_controller *controller) static int setup(struct spi_device *spi) { - struct pxa2xx_spi_chip *chip_info; struct chip_data *chip; const struct lpss_config *config; struct driver_data *drv_data = @@ -1218,25 +1217,6 @@ static int setup(struct spi_device *spi) chip->timeout = TIMOUT_DFLT; } - /* - * Protocol drivers may change the chip settings, so... - * if chip_info exists, use it. - */ - chip_info = spi->controller_data; - - /* chip_info isn't always needed */ - if (chip_info) { - if (chip_info->timeout) - chip->timeout = chip_info->timeout; - if (chip_info->tx_threshold) - tx_thres = chip_info->tx_threshold; - if (chip_info->tx_hi_threshold) - tx_hi_thres = chip_info->tx_hi_threshold; - if (chip_info->rx_threshold) - rx_thres = chip_info->rx_threshold; - chip->dma_threshold = 0; - } - chip->cr1 = 0; if (spi_controller_is_target(drv_data->controller)) { chip->cr1 |= SSCR1_SCFR; @@ -1256,11 +1236,6 @@ static int setup(struct spi_device *spi) chip->lpss_tx_threshold = tx_thres; } - /* - * Set DMA burst and threshold outside of chip_info path so that if - * chip_info goes away after setting chip->enable_dma, the burst and - * threshold can still respond to changes in bits_per_word. - */ if (chip->enable_dma) { /* Set up legal burst and threshold for DMA */ if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi, diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index f1097c96c50f..ae9c99bc9f6c 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -35,20 +35,6 @@ struct pxa2xx_spi_controller { struct ssp_device ssp; }; -/* - * The controller specific data for SPI target devices - * (resides in spi_board_info.controller_data), - * copied to spi_device.platform_data ... mostly for - * DMA tuning. - */ -struct pxa2xx_spi_chip { - u8 tx_threshold; - u8 tx_hi_threshold; - u8 rx_threshold; - u8 dma_burst_size; - u32 timeout; -}; - struct spi_controller; struct spi_device; struct spi_transfer;